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Datasheet PDSP16116A Equivalent ( PDF ) |
N.º | Número de pieza | Descripción | Fabricantes | |
5 | PDSP16116A | 16 by 16 Bit Complex Multiplier
PDSP16116/A/MC
16 by 16 Bit Complex Multiplier
PDSP16116/A/MC
DS3858
ISSUE 3.0
June 2000
The PDSP16116A will multiply two complex (16 + 16) bit words every 50ns and can be configured to output the complete complex (32 + 32) bit result within a single cycle. The data format |
Zarlink Semiconductor |
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4 | PDSP16116AA0AC | 16 X 16 Bit Complex Multiplier PDSP16116
16 X 16 Bit Complex Multiplier
Supersedes October 1996 version, DS3707 - 4.2 DS3707 - 5.3 October 1997
The PDSP16116 contains four 16316 array multipliers, two 32-bit adder/subtractors and all the control logic required to support Block Floating Point Arithmetic as used in FFT application |
Mitel Networks Corporation |
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3 | PDSP16116AB0AC | 16 X 16 Bit Complex Multiplier PDSP16116
16 X 16 Bit Complex Multiplier
Supersedes October 1996 version, DS3707 - 4.2 DS3707 - 5.3 October 1997
The PDSP16116 contains four 16316 array multipliers, two 32-bit adder/subtractors and all the control logic required to support Block Floating Point Arithmetic as used in FFT application |
Mitel Networks Corporation |
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2 | PDSP16116AB0GG | 16 X 16 Bit Complex Multiplier PDSP16116
16 X 16 Bit Complex Multiplier
Supersedes October 1996 version, DS3707 - 4.2 DS3707 - 5.3 October 1997
The PDSP16116 contains four 16316 array multipliers, two 32-bit adder/subtractors and all the control logic required to support Block Floating Point Arithmetic as used in FFT application |
Mitel Networks Corporation |
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