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Datasheet 74VHC02 Equivalent ( PDF ) |
N.º | Número de pieza | Descripción | Fabricantes | |
13 | 74VHC02 | QUAD 2-INPUT NOR GATE 74VHC02
QUAD 2-INPUT NOR GATE
s HIGH SPEED: tPD = 3.6ns (TYP.) at VCC = 5V s LOW POWER DISSIPATION:
ICC = 2 µA (MAX.) at TA=25°C s HIGH NOISE IMMUNITY:
VNIH = VNIL = 28% VCC (MIN.) s POWER DOWN PROTECTION ON INPUTS
s SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8mA (MIN)
s BALANCED PROPAGATION DE |
STMicroelectronics |
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12 | 74VHC02 | Quad 2-Input NOR Gate 74VHC02 — Quad 2-Input NOR Gate
December 2007
74VHC02 Quad 2-Input NOR Gate
Features
■ High Speed: tPD = 3.6ns (Typ.) at VCC = 5V ■ Low power dissipation: ICC = 2µA (Max.) at TA = 25°C ■ High noise immunity: VNIH = VNIL = 28% VCC (Min.) ■ Power down protection is provided on all input |
Fairchild Semiconductor |
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11 | 74VHC02 | Quad 2-input NOR gate 74VHC02; 74VHCT02
Quad 2-input NOR gate
Rev. 01 — 13 August 2009
Product data sheet
1. General description
The 74VHC02; 74VHCT02 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7-A.
The 74VH |
NXP Semiconductors |
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10 | 74VHC02-Q100 | Quad 2-input NOR gate 74VHC02-Q100; 74VHCT02-Q100
Quad 2-input NOR gate
Rev. 1 — 15 November 2013
Product data sheet
1. General description
The 74VHC02-Q100; 74VHCT02-Q100 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC sta |
NXP Semiconductors |
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Número de pieza | Descripción | Fabricantes | |
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