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74S112 Price ( Datasheet, Hoja de datos )

N.º Número de pieza Descripción Fabricantes PDF
2 74S112   

Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop


DM74S112 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs August 1986 Revised April 2000 DM74S112 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs General Description This device contains two independent negative-edge-triggered J-K flip-flops with complementary outputs. The J and K data is processed by the flip-flops on the falling edge of the clock pulse. The clock triggering occurs at a voltage level and is not directly related to the transition time of the negative going edge of the clock pulse. Data on the J and K inputs can be chan
Fairchild Semiconductor
Fairchild Semiconductor
datasheet 74S112 pdf
1 74S112   

STTL double-J-K flip-flop


54S112/74S112 STTL 型双 J-K 触发器 (负沿触发、 带清零和预置) 典型参数: f 工作频率=125MHz Pd=75mW 外引线排列图 逻辑图 功能表 输 预置 PRE 入 时钟 输 K × × × L L H H × 出 清除 CLR CLK × × × ↓ ↓ ↓ ↓ H J × × × L H L H × H=高电平 L=低电平 Q H L H* QO H L 翻 QO Q ×=不定 ↓=从高电平过渡到低电平 L H L H H H H H H L L H H H H H L H H* Q0 QO=建立稳态输入条件之前 的 Q 电平 Q0 =建立稳态输入条件之前 L H 转 的 Q 电平 * 这种情况是不稳定的,即 当预置和清除输入回到高电 平时,状态将不能保持
TW
TW
datasheet 74S112 pdf


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SPS122

Modern EU gaming Machines require increased +12V current to accommodate the latest gaming peripherals. DC Converters have been engineered with Sanken’s latest technology to efficiently convert redundant power from our lamp gaming PSU and provide additional +12V capacity at the point of use.

Sanken
Sanken
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