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PDF SC724 Data sheet ( Hoja de datos )
| Número de pieza | SC724 | |
| Descripción | Very Low Ron Load Switch | |
| Fabricantes | Semtech | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de SC724 (archivo pdf) en la parte inferior de esta página. Total 15 Páginas | ||
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POWER MANAGEMENT
Features
Input Voltage Range – 1.1V to 3.6V
2A Continuous Output Current
Ultra-Low Ron – 36mΩ
Automatic Output Discharge Circuit
Fast Turn-on Option With No Output Discharge
Circuit – SC724
Extended Soft Start Option With Automatic Out-
put Discharge Circuit – SC725
Low Quiescent Current – 0.81µA(Typ.)
Low Shutdown Current < 1µA – SC724
1.1V Logic Level Enable Compatible With CMOS/GPIO
Control
Hardened ESD Protection 3kV
Package: CSP – 0.76mm × 0.76mm, 0.4mm Pitch
SC724/SC725
2A Low Vin, Very Low Ron
Load Switch
Description
The SC724/SC725 is a low input voltage, very low Ron
load switch designed for use in battery powered applica-
tions. Very low quiescent current of less than 2µA, and a
low shutdown current of less than 1µA (SC724) reduces
power loss during Standby and Off states. A logic level
Enable allows low voltage on/off control down to 1.1V.
The SC724 provides a quick turn on time, while the SC725
provides a longer soft start to limit inrush current. The
SC725 also features an automatic discharge circuit which
discharges the output when the part is disabled.
The SC724/SC725 is offered in an ultra-small 4-bump
0.76mm × 0.76mm Chip Scale Package (CSP) which
enables very small board area implementations. The
SC724/SC725 has an operating ambient temperature
range of -40°C to +85°C.
Applications
Smart Phones
Tablet PCs
GPS Devices
Battery Powered Equipment
Other Portable Device
SC724/SC725 offers an alternative bump connection
pattern to SC724/SC725. Please go to Semtech.com
website for details.
Device
Package
Automatic
Discharge
Rising Time
SC724
CSP
No 3µs(Typ.)
SC725
CSP
Yes 140µs(Typ.)
Typical Application Circuit
SUPPLY
1µF
ENABLE
VIN VOUT
SC724 / SC725
EN GND
LOAD
1µF
Rev. 2.0
© 2014 Semtech Corporation
1 page  
SC724/SC725
Electrical Characteristics (continued)
Parameter
Turn-on Delay Time
Symbol
TDT
Rising Time
SC725
Shutdown Current
TRT
ISD
Turn-on Delay Time
TDT
Rising Time
TRT
Output Pull-Down Resistance
RPD
Notes:
(1) IQ current includes EN pull-down current.
Conditions
VVIN =1.8V, IOUT = 200mA, V�EN =1.5V, COUT=1µF
VVIN =3.6V, IOUT = 200mA, V�EN =1.5V, COUT=1µF
VVIN =1.8V, IOUT = 200mA, V�EN =1.5V, COUT=1µF
VVIN =3.6V, IOUT = 200mA, V�EN =1.5V, COUT=1µF
VEN =0V, VOUT = open
VEN =0V, VOUT = open, TA = 25°�C�
VVIN =1.8V, IOUT = 200mA, V�EN =1.5V, COUT=1µF
VVIN =3.6V, IOUT = 200mA, V�EN =1.5V, COUT=1µF
VVIN =1.8V, IOUT = 200mA, V�EN =1.5V, COUT=1µF
VVIN =3.6V, IOUT = 200mA, V�EN =1.5V, COUT=1µF
VVIN =1.8V
Min Typ Max Units
11 µs
2.8 µs
8.5 µs
3 µs
8
0.6
240
110
250
140
220
µA
µA
µs
µs
µs
µs
Ω
Timing Diagram
Turn-on
Delay
VEN
Turn-off
Delay
90% VOUT
10%
Rising
Time
(Turn on time)=(Turn-on Delay)+(Rising Time)
Falling
Time
5 Page 
SC724/SC725
Application Information
Operation
Output Capacitor
The SC724/SC725 is an integrated high-side PMOS load
switch that is designed to support up to 2A continuous
output current and operate from an input voltage from
1.1V to 3.6V. The internal PMOS pass element has a very
lSoCw72O4N/SCre7s2i5staalnscoeporof v3i6dmesΩul(ttryap-liocwal)shatutVdINow= n1.a8nVd.
The
qui-
escent current for extended battery life during applica-
tion off and standby states.
SC725 provides longer Turn-on Delay Time and Rising
Time, which can help reduce inrush current and voltage
drop on the input supply rail during power on.
SC724 provides shorter Turn-on Delay and Rising Time for
applications where immediate response is required.
Output Voltage Pull-down
The SC725 also includes an automatic output discharge
function. It employs a 220Ω (typical) discharge path to
ground when the EN pin is disabled.
Enable
The EN pin controls the ON/OFF states of the load switch.
Pulling the EN pin HIGH turns on the load switch. Pulling
the EN pin LOW turns off the load switch. The EN pin
incorporates a 5.0MΩ (typical) pull-down resistor, so that
when the EN pin is floating the SC724/SC275 is disabled.
Input Capacitor
In order to reduce the effects of voltage drop, noise, and
bounce at the VIN pin, a filter/decoupling capacitor
between VIN to GND is recommended. A 1µF ceramic
capacitor is sufficient for most application conditions.
However, it should be noted that suppressing bounce at
input loop after EN is changed from HIGH to LOW can
require greater capacitor values depending on particular
designs. During certain shutdown conditions, as in the
case when input power supply is abruptly removed, the
input voltage may tend to drop faster than the output
voltage. In this event a reverse current, through the body
diode of internal PMOS FET, from VOUT to VIN can occur.
To limit this reverse current, the Cin value should be
selected greater than the Cout value.
A 1µF ceramic capacitor is normally used at the VOUT pin
to suppress output noise and provide smooth voltage to
the load. If a larger output capacitance value is used, the
input inrush current should be considered because the
power-on transient is also dependent on the output
capacitor value. Note that SC725 has longer Turn-on Delay
Time and Rising Time than SC724. If a larger output
capacitor is used, SC725 could significantly improve input
inrush current during power-on process.
Board Layout Considerations
Fig. 1 shows a typical application circuit with PCB induc-
tance on the circuit board. An important objective of the
layout is to minimize the PCB inductance by reducing the
length and increasing the width of the traces. The input
capacitor C1 and output capacitor C2 need to be placed
close to the SC724/SC725. To analyze the stray inductance,
Fig. 1 shows three current loops during the opening or
closing of the load switch. The magnitude of the voltage
ringing at VIN or VOUT pin is related to the PCB stray
inductance and the placement of the capacitors. It is
important to keep the voltage ringing below the maximum
voltage rating of the SC724/SC725.
LPCB
LPCB
VIN
LPCB
VOUT
+
- IIN
C1
1uF
SC724/SC725
GND
ISW
LPCB
C2
1uF IOUT
RL
LPCB
Figure 1 - PCB Circuit with Equivalent Parasitic
Inductance
Evaluation Board Information
The Top Layer and B ottom Layer o f a standard evaluation
board are shown in Fig. 2 and Fig. 3, respectively.
Both T1 and T2 test points are Kelvin connections which
can be used to minimize the
To enable the part, a jumper
measurement error of
can be used between
RVOINN.
and EN on J1. To disable the part, a jumper can be con-
nected between EN and GND on J1.
11
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet SC724.PDF ] | |
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