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PDF R5F11EA8ASP Data sheet ( Hoja de datos )

Número de pieza R5F11EA8ASP
Descripción MCU
Fabricantes Renesas 
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RL78/G1G
RENESAS MCU
1. OUTLINE
1.1 Features
Ultra-low power consumption technology
• VDD = single power supply voltage of 2.7 to 5.5 V
• HALT mode
• STOP mode
• SNOOZE mode
RL78 CPU core
• CISC architecture with 3-stage pipeline
• Minimum instruction execution time: Can be changed
from high-speed (0.04167 μs: @ 24 MHz operation with
high-speed on-chip oscillator) to low-speed (1.0 μs: @1
MHz operation with high-speed on-chip oscillator)
• Multiply/divide/multiply & accumulate instructions are
supported.
• Address space: 1 MB
• General-purpose registers: (8-bit register × 8) × 4 banks
• On-chip RAM: 1.5 KB
Code flash memory
• Code flash memory: 8 to 16 KB
• Block size: 1 KB
• Prohibition of block erase and rewriting (security
function)
• On-chip debug function
• Self-programming (flash shield window function)
High-speed on-chip oscillator
• Select from 48 MHz, 24 MHz, 16 MHz, 12 MHz, 8 MHz,
4 MHz, and 1 MHz
• High accuracy: ±2.0% (VDD = 2.7 to 5.5 V, TA = -20 to
+85°C)
Operating ambient temperature
• TA = -40 to +85°C
Power management and reset function
• On-chip power-on-reset (POR) circuit
• On-chip voltage detector (LVD) (Select interrupt and
reset from 6 levels)
Event link controller (ELC)
• Event signals of 18 to 19 types can be linked to the
specified peripheral function.
Serial interfaces
• CSI: 1 channel
• UART: 2 channels
• Simplified I2C: 1 channel
Datasheet
R01DS0241EJ0100
Rev. 1.00
Jul 31, 2014
Timer
• 16-bit timer: 7 channels
(Timer Array Unit (TAU): 4 channels, Timer RJ: 1
channel, Timer RD: 2 channels)
• 12-bit interval timer: 1 channel
• Watchdog timer: 1 channel (operable with the dedicated
low-speed on-chip oscillator)
A/D converter
• 8/10-bit resolution A/D converter (VDD = 2.7 to 5.5 V)
• Analog input: 8 to 12 channels
• Internal reference voltage (1.45 V) and temperature
sensor
Comparator
• 2 channels
Programmable gain amplifier
I/O port
• I/O port: 26 to 40
• Can be set to N-ch open drain, TTL input buffer, and on-
chip pull-up resistor
• Different potential interface: Can connect to a 2.5/3 V
device
• On-chip key interrupt function
• On-chip clock output/buzzer output controller
Others
• On-chip BCD (binary-coded decimal) correction circuit
Remark: The function mounted depend on the product.
See 1.6 Outline of Functions.
R01DS0241EJ0100 Rev. 1.00
Jul 31, 2014
Page 1 of 67

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R5F11EA8ASP pdf
RL78/G1G
1.3.2 32-pin products
• 32-pin plastic LQFP (7 × 7 mm, 0.8 mm pitch)
1. OUTLINE
P147/ANI18
P23/ANI3
P22/ANI2
P21/ANI1/AVREFM
P20/ANI0/AVREFP
P01/ANI16/TO00/RxD1/PGAI/TRJIO0
P00/ANI17/TI00/TxD1/CMP0P/(TRJO0)
P120/ANI19/CMP1P
24 23 22 21 20 19 18 17
25 16
26 15
27 14
28 13
29 12
30 11
31 10
32 9
12345678
P51/INTP2/SO00/TxD0/TOOLTxD
P50/INTP1/SI00/RxD0/TOOLRxD/SDA00/(TRJO0)
P30/INTP3/SCK00/SCL00/TRJO0
P70
P31/TI03/TO03/INTP4/PCLBUZ0/(TRJIO0)
P62/SSI00
P61
P60
Caution Connect the REGC pin to VSS pin via a capacitor (0.47 to 1 μF).
Remark 1. For pin identification, see 1.4 Pin Identification.
Remark 2. The functions in parentheses shown in the above figure can be assigned by setting peripheral I/O redirection register 1
(PIOR1).
R01DS0241EJ0100 Rev. 1.00
Jul 31, 2014
Page 5 of 67

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R5F11EA8ASP arduino
RL78/G1G
1. OUTLINE
1.6 Outline of Functions
[30-pin, 32-pin, 44-pin products (code flash memory 8 KB to 16 KB)]
Caution The above outline of the functions applies when peripheral I/O redirection register 1 (PIOR1) is
set to 00H.
(1/2)
30-pin
32-pin
44-pin
Item
R5F11EA8ASP,
R5F11EB8AFP,
R5F11EF8AFP,
R5F11EAAASP
R5F11EBAAFP
R5F11EFAAFP
Code flash memory (KB)
8 to 16
RAM (KB)
1.5
Address space
1 MB
Main system High-speed system X1 (crystal/ceramic) oscillation, external main system clock input (EXCLK)
clock
clock
1 to 20 MHz: VDD = 2.7 to 5.5 V
High-speed on-chip HS (high-speed main) mode: 1 to 24 MHz (VDD = 2.7 to 5.5 V)
oscillator clock (fIH)
Low-speed on-chip oscillator clock 15 kHz (TYP.): VDD = 2.7 to 5.5 V
General-purpose register
8 bits × 32 registers (8 bits × 8 registers × 4 banks)
Minimum instruction execution
time
0.04167 μs (High-speed on-chip oscillator clock: fIH = 24 MHz operation)
0.05 μs (High-speed system clock: fMX = 20 MHz operation)
Instruction set
• Data transfer (8/16 bits)
• Adder and subtractor/logical operation (8/16 bits)
• Multiplication (8 bits × 8 bits, 16 bits × 16 bits), Division (16 bits ÷ 16 bits, 32 bits ÷ 32 bits)
• Multiplication and Accumulation (16 bits × 16 bits + 32 bits)
• Rotate, barrel shift, and bit manipulation (Set, reset, test, and Boolean operation), etc.
I/O port
Total
26 28 40
CMOS I/O
23
25
35
CMOS input
3
3
5
CMOS output
N-ch open-drain I/O
(6 V tolerance)
Timer
16-bit timer
7 channels
(TAU: 4 channels, Timer RJ: 1 channel, Timer RD: 2 channels)
Watchdog timer
1 channel
12-bit interval timer 1 channel
Timer output
Timer outputs: 14 channels
PWM outputs: 9 channels
Caution
Since a library is used when rewriting the flash memory using the user program, flash ROM and RAM areas are
used. Refer to the RL78 Family Flash Self-Programming Library Type01 User’s Manual before using these
products.
R01DS0241EJ0100 Rev. 1.00
Jul 31, 2014
Page 11 of 67

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