PDF R5F5630 Data sheet ( Hoja de datos )

Número de pieza	R5F5630
Descripción	MCUs
Fabricantes	Renesas
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Features DATASHEET RX630 Group Renesas MCUs R01DS0060EJ0160 Rev.1.60 100-MHz 32-bit RX MCU, on-chip FPU, 165 DMIPS, May 19, 2014 up to 2-MB flash memory, USB 2.0 full-speed function interface, CAN, 10- & 12-bit A/D converter, RTC, up to 22 comms interfaces Features ■ 32-bit RX CPU core  Max. operating frequency: 100 MHz Capable of 165 DMIPS in operation at 100 MHz  Single precision 32-bit IEEE-754 floating point  Two types of multiply-and-accumulation unit (between memories and between registers)  32-bit multiplier (fastest instruction execution takes one CPU clock cycle)  Divider (fastest instruction execution takes two CPU clock cycles)  Fast interrupt  CISC Harvard architecture with 5-stage pipeline  Variable-length instructions: Ultra-compact code  Supports the memory protection unit (MPU)  Two types of debugging interfaces: JTAG and FINE (two-line) ■ Low-power design and architecture  Operation from a single 2.7- to 3.6-V supply  Low power consumption: A product that supports all peripheral functions draws only 500 μA/MHz.  RTC is capable of operation from a dedicated power supply (min. operating voltage: 2.3 V).  Four low-power modes ■ On-chip main flash memory, no wait states  100-MHz operation, 10-ns read cycle (no wait states)  384-Kbyte to 2-Mbyte capacities  User code is programmable by on-board or off-board programming. ■ On-chip data flash memory  Max. 32 Kbytes, reprogrammable up to 100,000 times  Programming/erasing as background operations (BGOs) ■ On-chip SRAM, no wait states  32- to 128-Kbyte capacities  For instructions and operands  Can provide backup on deep software standby ■ DMA  DMAC: Incorporates four channels  DTC ■ Reset and supply management  Power-on reset (POR)  Low voltage detection (LVD) with voltage settings ■ Clock functions  External crystal oscillator or internal PLL for operation at 4 to 16 MHz  Internal 125-kHz LOCO and 50-MHz HOCO  125-kHz clock for the IWDT  Frequency of the oscillator for sub-clock generation: 32 kHz ■ Real-time clock  Adjustment functions (30 seconds, leap year, and error)  Time capture function (for capturing times in response to event-signal input on external pins) ■ Independent watchdog timer  125-kHz LOCO clock operation ■ Useful functions for IEC60730 compliance  Oscillation-stop detection, frequency measurement, CRC, IWDT, self-diagnostic function for the A/D converter, etc. PLQP0176KB-A 24 × 24 mm, 0.5-mm pitch PLQP0144KA-A 20 × 20 mm, 0.5-mm pitch PLQP0100KB-A 14 × 14 mm, 0.5-mm pitch PLQP0080KB-A 12 × 12 mm, 0.5-mm pitch PTLG0177JB-A 8 × 8 mm, 0.5-mm pitch PTLG0145KA-A 7 × 7 mm, 0.5-mm pitch PTLG0100KA-A 5.5 × 5.5 mm, 0.5-mm pitch PLBG0176GA-A 13 × 13 mm, 0.8-mm pitch ■ Up to 22 communications interfaces  USB 2.0 full-speed function interface (1 channel)  CAN (compliant with ISO11898-1), incorporating 32 mailboxes (up to 3 channels)  SCI with multiple functionalities (up to 13 channels) Choose from among asynchronous mode, clock-synchronous mode, smart-card interface mode, simple SPI, simple I2C, and extended serial mode.  I2C bus interface for transfer at up to 1 Mbps (up to 4 channels)  RSPI for high-speed transfer (up to 3 channels) ■ External address space  8 CS areas (8 × 16 Mbytes)  Multiplexed address data or separate address lines are selectable per area.  8-, 16-, or 32-bit bus space is selectable per area ■ Up to 20 extended-function timers  16-bit MTU2: input capture, output capture, complementary PWM output, phase-counting mode (6 channels)  16-bit TPU: input capture, output capture, phase-counting mode (12 channels)  8-bit TMR (4 channels)  16-bit compare-match timers (4 channels) ■ A/D converter for 1-MHz operation  Up to 21 12-bit channels, and incorporating 1 sample-and-hold circuit  Up to 8 10-bit channels, and incorporating 1 sample-and-hold circuit  Addition of results of A/D conversion (in the 12-bit A/D converter)  self-diagnosis (for the 10-bit A/D converter) ■ 10-bit D/A converter: 2 channels ■ Temperature sensor for measuring temperature within the chip ■ Register write protection function can protect values in important registers against overwriting. ■ Up to 148 general I/O port pins for GPIO  5-V tolerance, open drain, input pull-up, switchable driving ability ■ Unique ID  16-byte ID code is provided for each chip (only for the G version) ■ Operating temp. range  D version: -40 to +85°C  G version: -40 to +105°C R01DS0060EJ0160 Rev.1.60 May 19, 2014 Page 1 of 154 1 page RX630 Group 1. Overview Table 1.1 Outline of Specifications (4/5) Classification Module/Function Communication USB 2.0 function function module (USBa) Serial communications interfaces (SCIc, SCId) I2C bus interfaces (RIIC) IEBus (IEB) CAN module (CAN) Serial peripheral interfaces (RSPI) 12-bit A/D converter (S12ADa) Description  Includes a UDC (USB Device Controller) and transceiver for USB 2.0  Single port  Compliance with the USB 2.0 specification  Transfer rate: Full speed (12 Mbps)  Self-power mode and bus power are selectable  Incorporates 2 Kbytes of RAM as a transfer buffer  13 channels (SCIc: 12 channels + SCId: 1 channel)  SCIc Serial communications modes: Asynchronous, clock synchronous, and smart-card interface Multi-processor function On-chip baud rate generator allows selection of the desired bit rate Choice of LSB-first or MSB-first transfer Average transfer rate clock can be input from TMR timers for SCI5, SCI6, and SCI12 Simple I2C Simple SPI  SCId (The following functions are added to SCIc) Supports the serial communications protocol, which contains the start frame and information frame Supports the LIN format  4 channels (one of them is FM+) Communication formats I2C bus format/SMBus format Supports the multi-master Max. transfer rate: 1 Mbps (channel 0)  1 channel  Supports protocol control for the IEBus Half-duplex asynchronous transfer Multi-master operation Broadcast communications function Two selectable modes, differentiated by transfer rate  3 channels  Compliance with the ISO11898-1 specification (standard frame and extended frame)  32 mailboxes per channel  3 channels  RSPI transfer facility Using the MOSI (master out, slave in), MISO (master in, slave out), SSL (slave select), and RSPCK (RSPI clock) signals enables serial transfer through SPI operation (four lines) or clock-synchronous operation (three lines) Capable of handling serial transfer as a master or slave  Data formats Switching between MSB first and LSB first The number of bits in each transfer can be changed to any number of bits from 8 to 16, or to 20, 24, or 32 bits. 128-bit buffers for transmission and reception Up to four frames can be transmitted or received in a single transfer operation (with each frame having up to 32 bits)  Buffered structure Double buffers for both transmission and reception  1 unit (1 unit × 21 channels)  12-bit resolution  Conversion time: 1.0 s per channel (in operation with PCLK at 50 MHz)  Operating mode Scan mode (single scan mode or continuous scan mode)  Sample-and-hold function  Reference voltage generation  Three ways to start A/D conversion Conversion can be started by a software trigger, a trigger from a timer (MTU, TPU, or TMR), or an external trigger signal  A/D conversion of the temperature sensor output R01DS0060EJ0160 Rev.1.60 May 19, 2014 Page 5 of 154 5 Page RX630 Group 1.3 Block Diagram Figure 1.2 shows a block diagram. 1. Overview ROM RAM RX CPU MPU Clock generation circuit ICUb DTCa DMACA × 4 channels E2 DataFlash WDTA IWDTa CRC SCIc × 12 channels SCId × 1 channel USBa × 1 port RSPI (unit 0) RSPI (unit 1) RSPI (unit 2) CAN × 3 channels MTU2a × 6 channels POE2a TPUa × 6 channels (unit 0) TPUa × 6 channels (unit 1) PPG (unit 0) PPG (unit 1) TMR × 2 channels (unit 0) TMR × 2 channels (unit 1) CMT × 2 channels (unit 0) CMT × 2 channels (unit 1) RTCa RIIC × 4 channels IEB 12-bit ADC × 21 channels 10-bit ADC × 8 channels 10-bit DAC × 2 channels Temperature sensor BSC External bus Port 0 Port 1 Port 2 Port 3 Port 4 Port 5 Port 6 Port 7 Port 8 Port 9 Port A Port B Port C Port D Port E Port F Port G Port H Port J Port K Port L ICUb: Interrupt controller DTCa: Data transfer controller DMACA: DMA controller BSC: Bus controller WDTA: Watchdog timer IWDTa: Independent watchdog timer CRC: CRC (cyclic redundancy check) calculator SCIc, SCId: Serial communications interface USBa: USB 2.0 function module RSPI: Serial peripheral interface MPU: Memory protection unit CAN: CAN module MTU2a: Multi-function timer pulse unit 2 POE2a: Port output enable 2 TPUa: 16-bit timer pulse unit PPG: Programmable pulse generator TMR: 8-bit timer CMT: Compare match timer RTCa: Realtime clock RIIC: I2C bus interface IEB: IEBus controller Figure 1.2 Block Diagram R01DS0060EJ0160 Rev.1.60 May 19, 2014 Page 11 of 154 11 Page

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