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PDF VNQ7140AJ-E Datasheet ( Hoja de datos )

Número de pieza VNQ7140AJ-E
Descripción Quad channel high-side driver
Fabricantes STMicroelectronics 
Logotipo STMicroelectronics Logotipo

Total 30 Páginas
		
VNQ7140AJ-E Hoja de datos, Descripción, Manual
VNQ7140AJ-E
Quad channel high-side driver with MultiSense analog feedback
for automotive applications
Datasheet - production data
PowerSSO-16
GAPGCFT00327
– Configurable latch-off on overtemperature
or power limitation with dedicated fault
reset pin
– Loss of ground and loss of VCC
– Reverse battery with external components
– Electrostatic discharge protection
Features
Max transient supply voltage
VCC
Operating voltage range
VCC
Typ. on-state resistance (per Ch) RON
Current limitation (typ)
ILIMH
Stand-by current (max)
ISTBY
40 V
4 to 28 V
140 mΩ
12 A
0.5 µA
General
– Quad channel smart high-side driver with
MultiSense analog feedback
– Very low standby current
– Compatible with 3 V and 5 V CMOS
outputs
MultiSense diagnostic functions
– Multiplexed analog feedback of: load
current with high precision proportional
current mirror, VCC supply voltage and
TCHIP device temperature
– Overload and short to ground (power
limitation) indication
– Thermal shutdown indication
– OFF-state open-load detection
– Output short to VCC detection
– Sense enable/disable
Protections
– Undervoltage shutdown
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
Applications
All types of automotive resistive, inductive and
capacitive loads
Specially intended for automotive signal lamps
(up to R10W or LED Real Combinations)
Description
The VNQ7140AJ-E is a quad channel high-side
driver manufactured using ST proprietary
VIPower® technology and housed in
PowerSSO-16 package. The device is designed
to drive 12 V automotive grounded loads through
a 3 V and 5 V CMOS-compatible interface,
providing protection and diagnostics.
The device integrates advanced protective
functions such as load current limitation, overload
active management by power limitation and
overtemperature shutdown with configurable
latch-off.
A FaultRST pin unlatches the output in case of
fault or disables the latch-off functionality.
A dedicated multifunction multiplexed analog
output pin delivers sophisticated diagnostic
functions including high precision proportional
load current sense, supply voltage feedback and
chip temperature sense, in addition to the
detection of overload and short circuit to ground,
short to VCC and OFF-state open-load.
A sense enable pin allows OFF-state diagnosis to
be disabled during the module low-power mode
as well as external sense resistor sharing among
similar devices
October 2014
This is information on a product in full production.
DocID018837 Rev 8
1/48
www.st.com

1 page

VNQ7140AJ-E pdf
VNQ7140AJ-E
List of figures
List of figures
Figure 1.
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Figure 46.
Figure 47.
Figure 48.
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
IOUT/ISENSE versus IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Current sense precision vs. IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Switching time and Pulse skew . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
MultiSense timings (current sense mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Multisense timings (chip temperature and VCC sense mode) . . . . . . . . . . . . . . . . . . . . . . 20
TDSKON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Latch functionality - behavior in hard short circuit condition (TAMB << TTSD) . . . . . . . . . . . 23
Latch functionality - behavior in hard short circuit condition . . . . . . . . . . . . . . . . . . . . . . . . 23
Latch functionality - behavior in hard short circuit condition (autorestart mode + latch off) 24
Standby mode activation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Standby state diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
OFF-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Standby current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
IGND(ON) vs. Iout. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Logic Input high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Logic Input low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
High level logic input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Low level logic input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Logic Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
FaultRST Input clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
On-state resistance vs. Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
On-state resistance vs. VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Won vs. Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Woff vs. Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
ILIMH vs. Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
OFF-state open-load voltage detection threshold. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Vsense clamp vs. Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Vsenseh vs. Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Simplified internal structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Multisense and diagnostic – block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Multisense block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Analogue HSD – open-load detection in off-state. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Open-load / short to VCC condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
GND voltage shift . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Maximum turn off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
PowerSSO-16 on two-layers PCB (2s0p to JEDEC JESD 51-5) . . . . . . . . . . . . . . . . . . . . 40
PowerSSO-16 on four-layers PCB (2s2p to JEDEC JESD 51-7) . . . . . . . . . . . . . . . . . . . . 40
PowerSSO-16 Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . 41
PowerSSO-16 thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . 41
Thermal fitting model for PowerSSO-16 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
PowerSSO-16 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
DocID018837 Rev 8
5/48
5

5 Page

VNQ7140AJ-E arduino
VNQ7140AJ-E
Electrical specification
Table 6. Switching (VCC = 13 V; -40°C < Tj < 150°C, unless otherwise specified)
Symbol
Parameter
Test conditions Min. Typ. Max. Unit
td(on)(1)
Turn-on delay time at Tj = 25°C
td(off)(1)
Turn-off delay time at Tj = 25°C
(dVOUT/dt)on(1) Turn-on voltage slope at Tj = 25°C
(dVOUT/dt)off(1) Turn-off voltage slope at Tj = 25°C
RL = 13 Ω
RL = 13 Ω
WON
Switching energy losses at turn-on
(twon)
RL = 13 Ω
WOFF
tSKEW(1)
Switching energy losses at turn-off
(twoff)
RL = 13 Ω
Differential Pulse skew (tPHL- tPLH) RL = 13 Ω
10 70 120
µs
10 40 100
0.1 0.29 0.7
V/µs
0.1 0.35 0.7
— 0.15 0.2(2) mJ
— 0.1 0.18(2) mJ
-90 -40 10 µs
1. See Figure 6: Switching time and Pulse skew.
2. Parameter guaranteed by design and characterization; not subject to production test.
Symbol
Table 7. Logic Inputs (7 V < VCC < 28 V; -40°C < Tj < 150°C)
Parameter
Test conditions Min. Typ. Max. Unit
INPUT0,1,2,3 characteristics
VIL
IIL
VIH
IIH
VI(hyst)
Input low level voltage
Low level input current
Input high level voltage
High level input current
Input hysteresis voltage
VICL
Input clamp voltage
FaultRST characteristics
VFRL
IFRL
VFRH
IFRH
VFR(hyst)
Input low level voltage
Low level input current
Input high level voltage
High level input current
Input hysteresis voltage
VFRCL Input clamp voltage
SEL0,1,2 characteristics (7 V < VCC < 18 V)
VSELL
ISELL
VSELH
ISELH
Input low level voltage
Low level input current
Input high level voltage
High level input current
VIN = 0.9 V
VIN = 2.1 V
IIN = 1 mA
IIN = -1 mA
VIN = 0.9 V
VIN = 2.1 V
IIN = 1 mA
IIN = -1 mA
VIN = 0.9 V
VIN = 2.1 V
0.9
1
2.1
10
0.2
5.3 7.2
-0.7
V
µA
V
µA
V
V
0.9
1
2.1
10
0.2
5.3 7.5
-0.7
V
µA
V
µA
V
V
0.9 V
1 µA
2.1 V
10 µA
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11/48
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