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PDF M37540M4-XXXGP Data sheet ( Hoja de datos )

Número de pieza M37540M4-XXXGP
Descripción SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Fabricantes Renesas 
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7540 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
REJ03B0011-0400
Rev.4.00
Jun 21, 2004
DESCRIPTION
The 7540 Group is the 8-bit microcomputer based on the 740 fam-
ily core technology.
The 7540 Group has a serial I/O, 8-bit timers, a 16-bit timer, and
an A/D converter, and is useful for control of home electric appli-
ances and office automation equipment.
FEATURES
Basic machine-language instructions ...................................... 71
The minimum instruction execution time ......................... 0.34 µs
(at 6 MHz oscillation frequency, double-speed mode for the
shortest instruction)
Memory size ROM ............................................ 8 K to 32 K bytes
RAM ............................................. 384 to 768 bytes
Programmable I/O ports ....................... 29 (25 in 32-pin version)
Interrupts ................................................. 15 sources, 15 vectors
................................. (14 sources, 14 vectors for 32-pin version)
Timers ............................................................................. 8-bit 4
...................................................................................... 16-bit 1
Serial I/O1 ................... 8-bit 1 (UART or Clock-synchronized)
Serial I/O2 (Note 1) ..................... 8-bit 1 (Clock-synchronized)
A/D converter ............................................... 10-bit 8 channels
.................................................... (6 channels for 32-pin version)
Clock generating circuit ............................................. Built-in type
(low-power dissipation by an on-chip oscillator enabled)
(connect to external ceramic resonator or quartz-crystal oscilla-
tor permitting RC oscillation)
Watchdog timer ............................................................ 16-bit 1
Power source voltage
XIN oscillation frequency at ceramic oscillation, in double-speed mode
At 6 MHz .................................................................... 4.5 to 5.5 V
XIN oscillation frequency at ceramic oscillation, in high-speed mode
At 8 MHz .................................................................... 4.0 to 5.5 V
At 4 MHz .................................................................... 2.4 to 5.5 V
At 2 MHz .................................................................... 2.2 to 5.5 V
XIN oscillation frequency at RC oscillation in high-speed mode or
middle-speed mode
At 4 MHz .................................................................... 4.0 to 5.5 V
At 2 MHz .................................................................... 2.4 to 5.5 V
At 1 MHz .................................................................... 2.2 to 5.5 V
Power dissipation
Mask ROM version ....................................... 22.5 mW (standard)
One Time PROM version ................................ 30 mW (standard)
Operating temperature range ................................... –20 to 85 °C
(–40 to 85 °C for extended operating temperature version)
(–40 to 125 °C for extended operating temperature 125 °C ver-
sion (Note 2))
APPLICATION
Office automation equipment, factory automation equipment,
home electric appliances, consumer electronics, car, etc.
Notes 1: Serial I/O2 can be used in the following cases;
(1) Serial I/O1 is not used,
(2) Serial I/O1 is used as UART and BRG output divided by 16 is
selected as the synchronized clock.
2: In this version, the operating temperature range and total time
are limited as follows;
55 °C to 85 °C: within total 6000 hours,
85 °C to 125 °C: within total 1000 hours.
Rev.4.00 Jun 21, 2004 page 1 of 82
REJ03B0011-0400Z

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M37540M4-XXXGP pdf
7540 Group
Fig. 6 Functional block diagram (36P2R package)
Rev.4.00 Jun 21, 2004 page 5 of 82
REJ03B0011-0400Z

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M37540M4-XXXGP arduino
7540 Group
On-going Routine
Store Return Address
on Stack
Interrupt request
(Note)
M (S) (PCH)
Execute JSR
(S) (S – 1)
M (S) (PCL)
(S) (S – 1)
Subroutine
Restore Return
Address
Execute RTS
(S) (S + 1)
(PCL) M (S)
(S) (S + 1)
(PCH) M (S)
M (S) (PCH)
(S) (S – 1)
M (S) (PCL)
Store Return Address
on Stack
(S) (S – 1)
M (S) (PS)
Store Contents of Processor
Status Register on Stack
(S) (S – 1)
Interrupt
Service Routine
Execute RTI
(S) (S + 1)
(PS) M (S)
I Flag “0” to “1”
Fetch the Jump Vector
Restore Contents of
Processor Status Register
(S) (S + 1)
(PCL) M (S)
(S) (S + 1)
Restore Return
Address
(PCH) M (S)
Note : The condition to enable the interrupt Interrupt enable bit is “1”
Interrupt disable flag is “0”
Fig. 10 Register push and pop at interrupt generation and subroutine call
Table 3 Push and pop instructions of accumulator or processor status register
Accumulator
Processor status register
Push instruction to stack
PHA
PHP
Pop instruction from stack
PLA
PLP
Rev.4.00 Jun 21, 2004 page 11 of 82
REJ03B0011-0400Z

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