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PDF RFFC5061 Data sheet ( Hoja de datos )

Número de pieza RFFC5061
Descripción WIDEBAND SYNTHESIZER/VCO
Fabricantes RF Micro Devices 
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RFFC5061/62
Wideband Syn-
thesizer/VCO
with Integrated
6GHz Mixer
RFFC5061/62
WIDEBAND SYNTHESIZER/VCO WITH
INTEGRATED 6GHz MIXER
Package: QFN, 32-Pin, 5mmx5mm
RFFC5061
RFFC5062
Features
85MHz to 4200MHz LO
Frequency Range
Fractional-N Synthesizer with
Very Low Spurious Levels
Typical Step Size 1.5Hz
On-Chip Crystal-Sustaining
Circuit with Programmable
Loading Capacitors
Fully Integrated Low Phase Noise
VCO and LO Buffers
Integrated Phase Noise
• Typ. 0.3° rms at 1 GHz
• Typ. 0.8° rms at 3GHz
High Linearity RF Mixer(s)
30MHz to 6000MHz Mixer
Frequency Range
Input IP3 +23dBm
Mixer Bias Adjustable for Low
Power Operation
Full Duplex Mode (RFFC5061)
2.7V to 3.3V Power Supply
Low Current Consumption
3- or 4-Wire Serial Interface
Applications
Frequency Band Shifters
Wideband Radios
Diversity Receivers
Software Defined Radios
Phase
det.
Ref.
divider
Synth
Phase
det.
Ref.
divider
Synth
Functional Block Diagram
Product Description
The RFFC5061 and RFFC5062 are re-configurable frequency conversion devices
with integrated fractional-N phased locked loop (PLL) synthesizer, voltage con-
trolled oscillator (VCO) and either one or two high linearity mixers. The fractional-N
synthesizer takes advantage of an advanced sigma-delta modulator that delivers
ultra-fine step sizes and low spurious products. The RFFC5061 and RFFC5062
have been designed to use an external crystal, typically 26MHz, and have inte-
grated programmable loading capacitors. The PLL/VCO engine combined with an
external loop filter allows the user to generate local oscillator (LO) signals from
85MHz to 4200MHz. The LO signal is buffered and routed to the integrated RF mix-
ers which are used to up/down-convert frequencies ranging from 30MHz to
6000MHz. The mixer bias current is programmable and can be reduced for applica-
tions requiring lower power consumption. Both devices can be configured to work
as signal sources by bypassing the integrated mixers. Device programming is
achieved via a simple 3-wire serial interface. In addition, a unique programming
mode allows up to four devices to be controlled from a common serial bus. This
eliminates the need for separate chip-select control lines between each device and
the host controller. Up to six general purpose outputs are provided, which can be
used to access internal signals (e.g. the LOCK signal) or to control front end compo-
nents. Both devices operate with a 2.7V to 3.3V power supply.
DS110614
Optimum Technology Matching® Applied
GaAs HBT
GaAs MESFET
InGaP HBT
SiGe BiCMOS
Si BiCMOS
SiGe HBT
GaAs pHEMT
Si CMOS
Si BJT
GaN HEMT
BiFET HBT
LDMOS
RF MICRO DEVICES®, RFMD®, Optimum Technology Matching®, Enabling Wireless Connectivity™, PowerStar®, POLARIS™ TOTAL RADIO™ and UltimateBlue™ are trademarks of RFMD, LLC. BLUETOOTH is a trade-
mark owned by Bluetooth SIG, Inc., U.S.A. and licensed for use by RFMD. All other trade names, trademarks and registered trademarks are the property of their respective owners. ©2010, RF Micro Devices, Inc.
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or [email protected].
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RFFC5061 pdf
RFFC5061/62
Theory of Operation
The RFFC5061 and RFFC5062 are wideband RF frequency converter chips which include a fractional-N synthesizer and a low
noise VCO core. The RFFC5061 has an LO signal multiplexer, two LO buffer circuits, and two RF mixers. The RFFC5062 has a
single LO buffer circuit and one RF mixer. Both devices have an integrated voltage reference and low drop out regulators sup-
plying critical circuit blocks such as the VCOs and synthesizer. Synthesizer programming, device configuration and control are
achieved through a mixture of hardware and software controls. All on-chip registers are programmed through a simple 3-wire
serial interface.
VCO
The VCO core in the RFFC5061 and RFFC5062 consists of three VCOs which, in conjunction with the integrated LO dividers of
/2 to /32, cover the LO range of 85MHz to 4200MHz. Each VCO has 128 overlapping bands which are used to achieve low
VCO gain and optimal phase noise performance across the whole tuning range. The chip automatically selects the correct VCO
(VCO auto-select) and VCO band (VCO coarse tuning) to generate the desired LO frequency based on the values programmed
into the PLL1 and PLL2 registers banks.
The VCO auto-select and VCO coarse tuning are triggered every time ENBL is taken high, or if the PLL re-lock self clearing bit is
programmed high. Once the correct VCO and band have been selected the PLL will lock onto the correct frequency. During the
band selection process, fixed capacitance elements are progressively connected to the VCO resonant circuit until the VCO is
oscillating approximately at the correct frequency. The output of this band selection, CT_CAL, is made available in the read-
back register. A value of 127 or 0 in this register indicates that the coarse tuning was unsuccessful, and this will also be indi-
cated by the CT_FAILED flag also available in the read-back register. A CT_CAL value between 1 and 126 indicates a success-
ful calibration, the actual value being dependent on the desired frequency as well as process variation for a particular device.
The band select process will center the VCO tuning voltage at about 1.0V, compensating for manufacturing tolerances and pro-
cess variation as well as environmental factors including temperature. In applications where the device is left enabled at the
same LO frequency for some time, it is recommended that automatic band selection be performed for every 30°C change in
temperature. This assumes an active loop filter.
The RFFC5061 and RFFC5062 feature a differential LO input to allow the mixer to be driven from an external LO source. The
fractional-N PLL can be used with an external VCO driven into this LO input, which may be useful to reduce phase noise in
some applications. This may also require an external op-amp, dependant on the tuning voltage required by the external VCO.
In the RFFC5061 the LO signal is routed to mixer 1, mixer 2, or both mixers depending on the state of the MODE pin (or MODE
bit if under software control) and the value of the FULLD bit. Setting FULLD high puts the device into Full Duplex mode and both
mixers are enabled.
Fractional-N PLL
The RFFC5061 and RFFC5062 contain a charge pump-based fractional-N phase locked loop (PLL) for controlling the three
VCOs. The PLL has been designed to use a standard crystal of between 10MHz and 26MHz. The PLL includes automatic cali-
bration systems to counteract the effects of process and environmental variations, ensuring repeatable loop response and
phase noise performance. As well as the VCO auto-select and coarse tuning, there is a loop filter calibration mechanism which
can be enabled if required. This operates by adjusting the charge pump current to maintain loop bandwidth. This can be useful
for applications where the LO is tuned over a wide frequency range.
Two PLL programming banks are provided, the first bank is preceded by the label PLL1 and the second bank is preceded by the
label PLL2. For the RFFC5061 these banks are used to program mixer 1 and mixer 2 respectively, and are selected automati-
cally as the mixer is selected using MODE. For the RFFC5062 mixer 2 and register bank PLL2 are normally used.
The VCO outputs are first divided down in a high frequency prescalar. The output of this high frequency prescalar then enters
the N divider, which is a fractional divider containing a dual-modulus prescaler and a digitally spur-compensated fractional
sequence generator. This allows very fine frequency steps and minimizes fractional spurs. The fractional energy is randomized
and appears as fractional noise at frequency offsets above 100kHz which will be attenuated by the loop filter. An external loop
filter is used, giving flexibility in setting loop bandwidth for optimizing phase noise and lock time, for example.
DS110614
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or [email protected].
5 of 25

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RFFC5061 arduino
RFFC5061/62
Detailed Functional Block Diagram
+3V
OP2
Ext LO
RFXF8553
4:1 Balun
RFXF9503
1:1 Balun
IP2
Mixer 2
Loop
Filter
Pre-
scaler
+3V
Sequence
generator
N
divider
Phase
detector
/2n
[n=0..5]
51K
+3V
Control
Lines
3-Wire
Serial
Bus
MODE
ENBL
RESET
ENX
SDATA
SCLK
Reference
divider
GPO
Xtal oscillator
& tuning
Lock
Flag
Mixer 1
OP1
RFXF8553
4:1 Balun
IP1
RFXF9503
1:1 Balun
RFFC5061 Only
Note: Wideband transmission line transformer baluns shown above for operation to ~2.5GHz. Substitute baluns for higher fre-
quency applications as required.
DS110614
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or [email protected].
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