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PDF ATM0700D6J-CT Data sheet ( Hoja de datos )

Número de pieza ATM0700D6J-CT
Descripción LIQUID CRYSTAL DISPLAY
Fabricantes AZ Displays 
Logotipo AZ Displays Logotipo



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No Preview Available ! ATM0700D6J-CT Hoja de datos, Descripción, Manual

AZ DISPLAYS
SPECIFICATIONS FOR
LIQUID CRYSTAL DISPLAY
CUSTOMER APPROVAL
PART NO. : ATM0700D6J-CT (AZ DISPLAYS) VER1.0
APPROVAL
COMPANY
CHOP
CUSTOMER
COMMENTS
AZ DISPLAYS ENGINEERING APPROVAL
DESIGNED BY
CHECKED BY
APPROVED BY

1 page




ATM0700D6J-CT pdf
ATM0700D6J-CT(AZ DISPLAYS)TFT MODULE VER1.0
2. PIN ASSIGNMENT
TFT LCD Panel Driving Section
FPC Connector is used for the module electronics interface. The recommended model is
FH12A-50S-0.5SH manufactured by Hirose.
Pin No.
Symbol
Function
Level
Note
1,2
3,4
5
6
7
8
9
10
11
12~17
18~19
20~25
26~27
28~33
34~35
36
37
38
39
40
41
42
43
44
45
46
47
48
49~50
VLED+
VLED-
GND
VCOM
DVDD
MODE
DE
VS
HS
B7~B2
B1~B0
G7~G2
G1~G0
R7~R2
R1~R0
GND
DCLK
GND
L/R
U/D
VGH
VGL
AVDD
RESET
NC
VCOM
DITHB
GND
NC
Power for LED backlight(Anode)
Power for LED backlight(Cathode)
Power ground
Common voltage
Power for digital circuit
DE/SYNC mode select
Data input enable
Vertical sync input
Horizontal sync input
Blue data
Blue data
Green data
Green data
Red data
Red data
Power ground
Sample clock
Power ground
Left/Right selection
Up/Down selection
Gate on voltage
Gate off voltage
Power for analog circuit
Global reset pin
No connection
Common voltage
Dithering function
Power ground
No connection
P
P
P
P
P
I
I
I
I
I
I
I
I
I
I
P
I
P
I
I
P
P
P
I
--
P
I
P
--
Note 1
Note 2
Note 2
Note 2
Note 3
Note 4,5
Note 4,5
Note 6
Note 7
I: input, O: output, P: Power
Note 1: DE/SYNC mode select. Normally pull high.
When select DE mode, MODE=”1”, VS and HS must pull high.
When select SYNC mode, MODE= ”0”, DE must be grounded.
Note 2: When input 18 bits RGB data, the two low bits of R,G and B data must be
grounded.
Note 3: Data shall be latched at the falling edge of DCLK.
AZ DISPLAYS
4

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ATM0700D6J-CT arduino
ATM0700D6J-CT(AZ DISPLAYS)TFT MODULE VER1.0
3.3.2 Data Input Format
Figure 3.1 Horizontal input timing diagram.
Figure 3.2 Vertical input timing diagram.
AZ DISPLAYS
10

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