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PDF DDX-2050 Data sheet ( Hoja de datos )

Número de pieza DDX-2050
Descripción All-Digital High Efficiency Power Amplifier
Fabricantes Apogee Technology 
Logotipo Apogee Technology Logotipo



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No Preview Available ! DDX-2050 Hoja de datos, Descripción, Manual

DDX-2050
All-Digital High Efficiency Power Amplifier
FEATURES
HIGH OUTPUT CAPABILITY
2 x 30W into 8or 1 x 60W into 4
@ <1% THD
SINGLE SUPPLY (+9V to +30V)
COMPACT SURFACE MOUNT PACKAGE
HIGH EFFICIENCY, >88%
THERMAL OVERLOAD AND SHORT
CIRCUIT PROTECTION
BENEFITS
COMPLETE SURFACE MOUNT DESIGN
POWER SUPPLY SAVINGS
APPLICATIONS
DIGITAL POWERED SPEAKERS
PC SOUND CARDS
CAR AUDIO
SURROUND SOUND SYSTEMS
DIGITAL AUDIO COMPONENTS
GENERAL DESCRIPTION
The DDX-2050 power device is a monolithic dual
channel H-Bridge that can provide up to 30 watts
per channel of audio power at very high
efficiency.
The DDX-2050 power device
contains a logic interface, integrated bridge
drivers, high efficiency MOSFET output
transistors and protection circuitry. The device
may be used as a dual bridge or reconfigured as
a single bridge with double the output current
capability.
The benefits of the DDX amplification system are
an all-digital design that eliminates the need for a
digital to analog converter (DAC) and the high
efficiency operation derived from the use of
Apogee's patented damped ternary pulse width
modulation (PWM). This approach provides an
efficiency advantage over conventional Class-D
designs and up to three times the efficiency of
typical Class A/B amplifiers with music input
signals.
INLA
BIAS
CONFIG
PWRDN
FAULT
TRISTATE
TWARN
GNDREF
INLB
INRA
VSIG
VREG2
VREG2
VREG1
VREG1
GNDR1
INRB
PROTECTION
AND
DRIVER
LOGIC
FET
DRIVE
FET
DRIVE
REGULATORS
FET
DRIVE
FET
DRIVE
Figure 1. Block Diagram
VCC1P
OUTPL
OUTPL
PGND1P
VCC1N
OUTNL
OUTNL
PGND1N
VCC2P
OUTPR
OUTPR
PGND2P
VCC2N
OUTNR
OUTNR
PGND2N
Specifications are subject to change without notice.
129 Morgan Drive, Norwood, MA 02062 voice: (781) 551-9450 fax: (781) 440-9528 email: [email protected]
CONTROLLED DOCUMENT:
DRN: PRELIMINARY
Page 1 of 13

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DDX-2050 pdf
DDX-2050
60
55
50
O
U 45
T
P 40
W
R 35
W 30
R
M
25
S 20
15
10
5
0
5
10
8 OhmLoad, Iout =3A
8 OhmLoad, Iout =5A
6 OhmLoad, Iout =3A
6 OhmLoad, Iout =5A
4 OhmLoad, Iout =3A
4 OhmLoad, Iout =5A
Output Power vs Supply
15 20
Power Supply Voltage (VDC)
4
6
8
25
30
Figure 2. Output Power vs. Supply Voltage for Stereo Bridge.
Figure 2 shows the full-scale output power (0dB FS digital input with unity amplifier gain) as a function
of Power Supply Voltage for 4, 6, and 8 Ohm loads. Output power is constrained for higher impedance
loads by the over-voltage protection limit of the DDX-2050 IC and by the over-current protection limit for
lower impedance loads. The minimum threshold for the over-current protection circuit is 3.0A (at 25 ºC)
but the typical threshold is 5A. Solid curves depict the worst case output power capability constrained
to a 3.0A current limit. Dashed curves depict typical output power capability of the device. Of course,
the output power curves assume proper thermal management of the power device’s internal
dissipation.
PRELIMINARY
Specifications are subject to change without notice.
PRELIMINARY
129 Morgan Drive, Norwood, MA 02062 voice: (781) 551-9450 fax: (781) 440-9528 email: [email protected]
CONTROLLED DOCUMENT: P_903-000030_Rev00 Data Sheet, DDX-2050.doc DRN: PRELIMINARY
Page 5 of 13

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DDX-2050 arduino
DDX-2050 POWER DEVICE
The DDX-2050 Power Device is a dual channel
H-Bridge that can deliver over 30 watts per
channel of audio output power at very high
efficiency. It converts DDX controlled PWM
signals to power at the load. The DDX-2050
includes a logic interface, integrated bridge
drivers, high efficiency MOSFET outputs and
over-voltage, thermal and short circuit
protection circuitry. Two logic level signals per
channel are used to control high-speed
MOSFET switches to connect the speaker load
to the input supply or to ground in a bridge
configuration, according to Apogee's patented
damped ternary PWM. The DDX-2050 includes
over-current, thermal, and over-voltage
protection and under-voltage lockout with
automatic recovery. A thermal warning status
is also provided.
INL[1:2]
INR[1:2]
VL
PWRDN
TRI-STATE
Logic I/F
and Decode
Left
H-Bridge
OUTPL
OUTNL
FAULT
TWARN
Protection
Circuitry
Regulators
Right
H-Bridge
OUTPR
OUTNR
Figure 9: DDX-2050 Block Diagram
Logic Interface and Decode
The DDX-2050 power outputs are controlled
using two logic level timing signals. In order to
provide a proper logic interface, the VL input
must operate at the same voltage as the DDX
controller logic supply.
Protection Circuitry
The DDX-2050 includes protection circuitry for
over-current, over-voltage, and thermal
overload conditions. A thermal warning pin
TWARN is activated low (open-drain MOSFET)
when the IC temperature exceeds 130°C, in
advance of the thermal shutdown protection.
When a fault condition is detected (logical OR
of over-current,
DDX-2050
over-voltage, and thermal), an internal fault
signal acts to immediately disable the output
power MOSFETs, placing both H-bridges in a
high impedance state. At the same time an
open-drain MOSFET connected to the FAULT
pin is switched on. There are two possible
modes subsequent to activating a fault. The
first is a SHUTDOWN mode. With FAULT (pull-
up resistor) and TRI-STATE pins independent,
an activated fault will disable the device,
signaling low at the FAULT output. The device
may subsequently be reset to normal operation
by toggling the TRI-STATE pin from High to
Low to High using an external logic signal. The
second is an AUTOMATIC recovery mode.
This is depicted in the application circuit in
Figure 4. The FAULT and TRI-STATE pins are
shorted together and connected to a time
constant circuit comprising R6 and C17. An
activated FAULT will force a reset on the TRI-
STATE pin causing normal operation to resume
following a delay determined by the time
constant of the circuit. If the fault condition is
still presented, the circuit operation will continue
repeating until such time as the fault condition
is removed. An increase in the time constant of
the circuit will produce a longer recovery
interval. Care must be taken in the overall
system design so as not to exceed the
protection thresholds under normal operation.
Power Outputs
The DDX-2050 power and output pins are
duplicated to provide a low impedance path for
the devices bridged outputs. All duplicate
power, ground and output pins must be
connected for proper operation. The PWRDN or
TRI-STATE pins should be used to set all
MOSFETS to the Hi-Z state during power-up
until the logic power supply, VL, is settled.
Parallel Output/High Current Operation
The DDX-2050 outputs can be connected in
parallel to increase the output current to a load.
In this configuration the device can provide over
60W into 4(see Figure 3). This mode is
enabled with the CONFIG pin connected to
VREG1 and the inputs combined INLA = INLB,
Specifications are subject to change without notice.
129 Morgan Drive, Norwood, MA 02062 voice: (781) 551-9450 fax: (781) 440-9528 email: [email protected]
CONTROLLED DOCUMENT:
DRN: PRELIMINARY
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