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PDF FPF2223 Datasheet ( Hoja de datos )

Número de pieza FPF2223
Descripción Integrated Load Switch
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo

Total 14 Páginas
		
FPF2223 Hoja de datos, Descripción, Manual
February 2009
FPF2223-FPF2225
Integrated Load Switch with Adjustable High Precision Current Limittm
Features
1.8 to 5.5V Input Voltage Range
Typical RDS(ON) = 140m @ VIN = 5.5V
Typical RDS(ON) = 160m @ VIN = 3.3V
250-625mA (min) Adjustable Current Limit
5% Current Limit Tolerance @ 625mA (min)
72 (typ) Output Discharge Resistance
ESD Protected, Above 8kV HBM and 2kV CDM
Applications
PDAs
Cell Phones
GPS Devices
MP3 Players
Digital Cameras
Peripheral Ports
Notebook Computer
General Description
The FPF2223-FPF2225 are low RDS(ON) P-Channel MOSFET
load switches with high precision current limit value. The input
voltage range operates from 1.8V to 5.5V to fulfill today's Ultra
Portable Device's supply requirement. Switch control is by a
logic input (ON) capable of interfacing directly with low voltage
control signal. On-chip pull-down is available for output quick
discharge when switch is turned off.
For the FPF2224, if the constant current condition still persists
after 30ms, these parts will shut off the switch and pull the fault
signal pin (FLAGB) low. The FPF2223 has an auto-restart
feature, which will turn the switch on again after 450mS if the
ON pin is still active. The FPF2224 do not have this auto-restart
feature so the switch will remain off until the ON pin is cycled.
For the FPF2225, a current limit condition will immediately pull
the fault signal pin low and the part will remain in the constant-
current mode until the switch current falls below the current
limit. For the FPF2223 through FPF2225, the current limit is set
by an external resistor and the minimum current limit is 250mA.
BOTTOM
Pin 1
TOP
Ordering Information
Part
FPF2223
FPF2224
FPF2225
Current Limit
(mA)
250-625
250-625
250-625
©2008 Fairchild Semiconductor Corporation
FPF2223-FPF2225 Rev. C
Current Limit
Blanking Time
(mS)
30
30
NA
Auto-Restart Time
(mS)
450
NA
NA
1
ON Pin
Activity
Active HI
Active HI
Active HI
www.fairchildsemi.com

1 page

FPF2223 pdf
Typical Characteristics
80
VON = VIN
70
60
50
40
30
20
10
1
2
85oC
25oC
-40oC
34
SUPPLY VOLTAGE (V)
5
Figure 1. Quiescent Current vs. Input Voltage
6
90
VON=VIN
80
70
60
50
40
30
20
-40
VIN=5.5V
VIN=3.3V
VIN=1.8V
-15 10 35
TJ, JUNCTION TEMPERATURE (oC)
60
Figure 2. Quiescent Current vs. Temperature
85
1.4
1.2
1.0
0.8
0.6
0.4
0.2
1
VIH
VIL
2345
VIN, SUPPLY VOLTAGE (V)
Figure 3. VON vs. Input Voltage
6
1.6
1.4
1.2
1
0.8
0.6
0.4
0.2
-40
VIN=5.5V
VIN=3.3V
VIN=1.2V
-15 10 35 60
TJ, JUNCTION TEMPERATURE (oC)
Figure 4. VON High Voltage vs. Temperature
85
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
-40
VIN=5.5V
VIN=3.3V
VIN=1.2V
-15 10 35
TJ, JUNCTION TEMPERATURE (oC)
60
Figure 5. VON Low Voltage vs. Temperature
85
0.05
0.04
0.03
0.02
0.01
VON = 5.5V
0.00
-0.01
-40
VON = 0V
-15 10 35
TJ, JUNCTION TEMPERATURE (oC)
60
85
Figure 6. On Pin Current vs. Temperature
FPF2223-FPF2225 Rev. C
5
www.fairchildsemi.com

5 Page

FPF2223 arduino
Take note that this is below the maximum package power
dissipation, and the thermal shutdown feature will act as
additional safety to protect the part from damage due to
excessive heating. The junction temperature is only able to
increase to the thermal shutdown threshold. Once this
temperature has been reached, toggling ON will not turn-on the
switch until the junction temperature drops. For the FPF2225, a
short on the output will cause the part to operate in a constant
current state dissipating a worst case power of:
P (Max) = VIN (MAX) * ILIM (MAX) = 5.5 * 0.693 = 3.8W
This large amount of power will activate the thermal shutdown
and the part will cycle in and out of thermal shutdown so long as
the ON pin is active and the short is present.
The following techniques have been identified to improve the
thermal performance of this family of devices. These
techniques are listed in order of the significance of their impact.
1. Thermal performance of the load switch can be improved by
connecting pin7 of the DAP (Die Attach Pad) to the GND plane
of the PCB.
2. Embedding two exposed through-hole vias into the DAP
(pin7) provides a path for heat to transfer to the back GND
plane of the PCB. A drill size of Round, 14 mils (0.35mm) with
1-ounce copper plating is recommended to result in appropriate
solder reflow. A smaller size hole prevents the solder from
penetrating into the via, resulting in device lift-up. Similarly, a
larger via-hole consumes excessive solder, and may result in
voiding of the DAP.
PCB Layout Recommendations
In order to benefit from adjustable, high-precision load switch
devices, a high-precision RSET value must be used to set a tight
current limit tolerance. Since ILIMIT (current limit value) is
determined by the voltage drop across the RSET, a poor PCB
layout can introduce parasitic noise on the ISET pin resulting in a
minor variation of ILIMIT. To improve the ILIMIT stability, parasitic
noise coupling mechanisms from ISET to GND must be
minimized. This becomes more critical when ILIMIT is set close
to the nominal load current operation where parasitic effects
could cause the device to go in and out of current limit and
result in an error flag report.
Care must be taken to provide a direct current return path
between the RSET ground pad and the device ground pad
(pin5). Please see current pad #2 in figure below.
Figure 25: Two through hole open vias embedded in DAP
1)Power current path
2)RSET current path
Figure 24: Eliminate parasitic noise of ISET-GND by providing a
separate ground route, unique from the power ground plane
Improving Thermal Performance
An improper layout could result in higher junction temperature
and triggering the thermal shutdown protection feature. This
concern applies when the switch is set at higher current limit
value and an over-current condition occurs. In this case, the
power dissipation of the switch, from the formula below, could
exceed the maximum absolute power dissipation of 1.2W.
PD = (VIN - VOUT) x ILIM (Max)
Figure 26: X-Ray result (bottom view with 45o angle)
3. The VIN, VOUT and GND pins will dissipate most of the heat
generated during a high load current condition. Using wide
traces will help minimize parasitic electrical effects along with
minimizing the case to ambient thermal impedance. The layout
suggested in Figure 27 provides each pin with adequate copper
so that heat may be transferred as efficiently as possible out of
the device. The low-power FLAGB and ON pin traces may be
laid-out diagonally from the device to maximize the area
available to the ground pad. Placing the input and output
capacitors as close to the device as possible also contributes to
heat dissipation, particularly during high load currents.
FPF2223-FPF2225 Rev. C
11
www.fairchildsemi.com

11 Page


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