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PDF MCP14E10 Data sheet ( Hoja de datos )

Número de pieza MCP14E10
Descripción 3.0A Dual High-Speed Power MOSFET Driver
Fabricantes Microchip 
Logotipo Microchip Logotipo



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MCP14E9/10/11
3.0A Dual High-Speed Power MOSFET Driver With Enable
Features
• High Peak Output Current: 3.0A (typical)
• Independent Enable Function for Each Driver
Output
• Wide Input Supply Voltage Operating Range:
- 4.5V to 18V
• Low Shoot-Through/Cross-Conduction Current in
Output Stage
• High Capacitive Load Drive Capability:
- tR: 14 ns with 1800 pF load (typical)
- tF: 17 ns with 1800 pF load (typical)
• Short Delay Times:
- tD1: 45 ns (typical)
- tD2: 45 ns (typical)
• Low Supply Current:
- With Logic ‘1’ Input/Enable – 1 mA (typical)
- With Logic ‘0’ Input/Enable – 300 µA (typical)
• Latch-up Protected: Passed JEDEC JESD78A
• Logic Input will Withstand Negative Swing,
up to 5V
• Space-Saving Packages:
- 8-Lead SOIC, PDIP, 6x5 DFN
Applications
• Switch Mode Power Supplies
• Pulse Transformer Drive
• Line Drivers
• Motor and Solenoid Drive
General Description
The MCP14E9/10/11 devices are high-speed MOSFET
drivers, capable of providing 3.0A of peak current. The
dual inverting, dual non-inverting and complementary
outputs are directly controlled from either TTL or
CMOS (3V to 18V). These devices also feature low
shoot-through current, near matched rise/fall times and
propagation delays, which make them ideal for high
switching frequency applications.
The MCP14E9/10/11 devices operate from a 4.5V to
18V single power supply and can easily charge and
discharge 1800 pF of MOSFET gate capacitance. They
provide low enough impedances, in both the ON and
OFF states, to ensure the MOSFETs’ intended state
will not be affected, even by large transients.
The additional control of the MCP14E9/10/11 outputs is
allowed by the use of separate enable functions. The
ENB_A and ENB_B pins are active-high and are
internally pulled up to VDD. The pins may be left floating
for standard operation.
The MCP14E9/10/11 dual output 3.0A driver family is
offered in both surface-mount and pin-through-hole
packages with a -40oC to +125oC temperature rating.
The low thermal resistance of the thermally enhanced
DFN package allows greater power dissipation
capability for driving heavier capacitive or resistive
loads.
These devices are highly latch-up resistant under any
conditions within their power and voltage ratings. They
are not subject to damage when up to 5V of noise
spiking (of either polarity) occurs on the ground pin.
The devices are fully latch-up protected when tested
according to JEDEC JESD78A. All terminals are fully
protected against Electrostatic Discharge (ESD), up to
4 kV (HBM) or 400V (MM).
© 2011 Microchip Technology Inc.
DS25005A-page 1

1 page




MCP14E10 pdf
MCP14E9/10/11
DC CHARACTERISTICS (OVER OPERATING TEMP. RANGE)(2) (CONTINUED)
Electrical Specifications: Unless otherwise indicated, operating temperature range with 4.5V VDD 18V.
Parameters
Sym Min Typ Max Units
Conditions
Enable Function (ENB_A, ENB_B)
High-Level Input Voltage
VEN_H
Low-Level Input Voltage
VEN_L
Hysteresis
Enable Pull-up Impedance
VHYST
RENBL
2.4
0.7
——
— 0.8
0.4 —
1.6 3.0
Propagation Delay Time
Propagation Delay Time
Power Supply
Supply Voltage
Supply Current
tD3 — 60 80
tD4 — 70 85
VDD
4.5
— 18.0
IDD — 1400 2200
IDD — 800 1100
IDD — 1300 2000
IDD — 1300 2000
IDD — 800 1200
IDD — 500 600
IDD — 600 900
IDD — 600 900
Note 1: Switching times are ensured by design.
2: Tested during characterization, not production tested.
V VDD = 12V, Low-to-High Transition
V VDD = 12V, High-to-Low Transition
V
MΩ VDD = 14V,
ENB_A = ENB_B = GND
ns Figure 4-3
ns Figure 4-3
V
µA VIN_A = 3V, VIN_B = 3V,
ENB_A = ENB_B = High
µA VIN_A = 0V, VIN_B = 0V,
ENB_A = ENB_B = High
µA VIN_A = 3V, VIN_B = 0V,
ENB_A = ENB_B = High
µA VIN_A = 0V, VIN_B = 3V,
ENB_A = ENB_B = High
µA VIN_A = 3V, VIN_B = 3V,
ENB_A = ENB_B = Low
µA VIN_A = 0V, VIN_B = 0V,
ENB_A = ENB_B = Low
µA VIN_A = 3V, VIN_B = 0V,
ENB_A = ENB_B = Low
µA VIN_A = 0V, VIN_B = 3V,
ENB_A = ENB_B = Low
TEMPERATURE CHARACTERISTICS
Electrical Specifications: Unless otherwise noted, all parameters apply with 4.5V VDD 18V.
Parameters
Sym Min Typ
Max Units
Conditions
Temperature Ranges
Specified Temperature Range
Maximum Junction Temperature
Storage Temperature Range
Package Thermal Resistances
Thermal Resistance, 8L-6x5 DFN
Thermal Resistance, 8L-PDIP
Thermal Resistance, 8L-SOIC
TA
TJ
TA
θJA
θJA
θJA
-40
+125
°C
+150
°C
-65
+150
°C
— 35.7
— °C/W Typical four-layer board with
vias to ground plane
— 89.3
— °C/W
— 149.5 — °C/W
© 2011 Microchip Technology Inc.
DS25005A-page 5

5 Page





MCP14E10 arduino
MCP14E9/10/11
3.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
PDIP, SOIC,
6x5 DFN
1
2
3
4
5
6
7
8
9
PIN FUNCTION TABLE
MCP14E9
Symbol
MCP14E10 MCP14E11
Description
ENB_A
IN A
GND
IN B
OUT B
VDD
OUT A
ENB_B
EP
ENB_A
IN A
GND
IN B
OUT B
VDD
OUT A
ENB_B
EP
ENB_A
IN A
GND
IN B
OUT B
VDD
OUT A
ENB_B
EP
Ouptut A Enable
Input A
Ground
Input B
Output B
Supply Input
Output A
Output B Enable
Exposed metal pad (DFN package only). Exposed pad is
electrically isolated.
3.1 Enable A (ENB_A)
The ENB_A pin is the enable control for Output A. This
enable pin is internally pulled up to VDD for active-high
operation and can be left floating for standard opera-
tion. When the ENB_A pin is pulled below the enable
pin, Low Level Input Voltage (VEN_L), Output A will be
in the OFF state, regardless of the input pin state.
3.5 Supply Input (VDD)
VDD is the bias supply input for the MOSFET driver and
has a voltage range of 4.5V to 18V. This input must be
decoupled to ground with a local ceramic capacitor.
This bypass capacitor provides a localized low-
impedance path for the peak currents that are provided
to the load.
3.2 Control Inputs A and B (IN A; IN B)
The MOSFET driver inputs are a high-impedance
TTL/CMOS compatible input. The inputs also have
hysteresis between the high and low input levels,
allowing them to be driven from slow rising and falling
signals, and to provide noise immunity.
3.3 Ground (GND)
Ground is the device return pin. The ground pin should
have a low-impedance connection to the bias supply
source return. High peak currents will flow out the
ground pin when the capacitive load is being
discharged.
3.4 Outputs A and B (OUT A; OUT B)
Outputs, A and B, are CMOS push-pull outputs that are
capable of sourcing and sinking 3.0A of peak current
(VDD = 18V). The low output impedance ensures the
gate of the MOSFET will stay in the intended state,
even during large transients.
3.6 Enable B (ENB_B)
The ENB_B pin is the enable control for Output B. This
enable pin is internally pulled up to VDD for active-high
operation, and can be left floating for standard opera-
tion. When the ENB_B pin is pulled below the enable
pin, Low-Level Input Voltage (VEN_L), Output B will be
in the OFF state, regardless of the input pin state.
3.7 Exposed Metal Pad (EP)
The exposed metal pad of the DFN package is not
internally connected to any potential. Therefore, this
pad can be connected to a ground plane, or other cop-
per plane on a printed circuit board, to aid in heat
removal from the package.
© 2011 Microchip Technology Inc.
DS25005A-page 11

11 Page







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