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PDF RHFLVDS2281 Data sheet ( Hoja de datos )
| Número de pieza | RHFLVDS2281 | |
| Descripción | dual 4x4 crosspoint switch LVDS | |
| Fabricantes | STMicroelectronics | |
| Logotipo |  |
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RHFLVDS2281
Rad-hard, dual 4x4 crosspoint switch LVDS
Datasheet - production data
Large input common mode: -4 V to +5 V
Guaranteed up to 300 krad TID
SEL immune up to 135 MeV.cm²/mg
SET/SEU immune up to 22 MeV.cm²/mg
Ceramic Flat-64
The upper metallic lid is
electrically connected to ground.
Features
LVDS input/output
Multiple configuration: Mux, repeater and
splitter
ANSI TIA/EIA-644 compliant
400 Mbps LVDS (200 MHz)
200 MHz clock channel
Cold spare on all pins
Fail-safe function
3.3 V operating power supply
4.8 V absolute rating
Hermetic package
Power consumption: 220 mW at 3.3 V
Description
The RHFLVDS2281 is an 8-channel, 4x4
crosspoint switch base, on low voltage differential
signaling (LVDS) for low-power and high-speed
communications. The two 4x4 multiplexers allow
connection from any of the four inputs to any of
the four outputs.
Packaged and qualified for use in aerospace
environments in a low-power, fast-transmission
standard, the RHFLVDS2281 operates at 3.3 V
power supply (3.6 V max. operating and 4.8 V
AMR) and a common mode of -4 V to +5 V. The
LVDS outputs operate over a controlled
impedance of 100-ohm transmission media that
may be printed circuit board traces, back planes,
or cables.
The circuit features an internal fail-safe function to
ensure a known state in case of an input short
circuit or a floating input.
All pins have cold spare buffers to ensure they are
in high impedance when VCC is tied to GND. The
RHFLVDS2281 can operate over a wide
temperature range of -55 °C to +125 °C and it is
housed in an hermetic Ceramic Flat-64 package.
Reference
SMD pin
Table 1. Device summary
Quality level Package Lead finish Mass EPPL(1) Temp. range
RHFLVDS2281K1
RHFLVDS2281K01V
-
5962F1423401
Engineering
model
QML-V flight
Ceramic
Flat-64
Gold
1.94 g
-
Target
-55 °C to
125 °C
1. EPPL = ESA preferred part list
March 2015
This is information on a product in full production.
DocID027588 Rev 1
1/17
www.st.com
1 page  
RHFLVDS2281
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Internal schematic and pin configuration
Figure 2. Pinout
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1. Power supplies are not internally separated. All Vcc pins must be connected to the same potential.
DocID027588 Rev 1
5/17
17
5 Page 
RHFLVDS2281
5 Test circuit
Test circuit
Figure 3. Voltage and current definition
II
VCM=(VIN+ + VIN-)/2
IN+
VID
LVDS
Receiver
IN-
VIN+ VIN-
LVDS
Driver
OUT+
VOD
OUT-
CL=10pF
100-ohm
VOS=(VOUT+ + VOUT- )/2
CL=10pF
Figure 4. Timing and voltage definitions for differential output signal
VIN+
VIN-
50%
50%
VOD
tPHLD
80%
20%
tPLHD
20%
80%
tf tr
1.
All
f=
input pulses are
1 MHz, ZO = 50
supplied by
Ω, and duty
a generator with
cycle = 50%.
the
following
characteristics:
tr
or
tf
≤ 1 ns,
2. The product is guaranteed with CL = 10 pF.
DocID027588 Rev 1
11/17
17
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet RHFLVDS2281.PDF ] | |
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