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PDF ADP1051 Data sheet ( Hoja de datos )

Número de pieza ADP1051
Descripción Digital Controller
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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No Preview Available ! ADP1051 Hoja de datos, Descripción, Manual

Preliminary Technical Data
Digital Controller for Isolated Power
Supply with PMBus Interface
ADP1051
FEATURES
Versatile, digital voltage mode controller
High speed, input voltage feed-forward control
6 PWM logic outputs with 625ps resolution
Switching frequency 50 kHz to 625 kHz
Frequency synchronization master & slave
Multiple energy saving modes
Adaptive dead-time compensation for efficiency
optimization
Low device power consumption - typical 100 mW
Direct Parallel operation
Accurate droop current share
Pre-bias start-up
Reverse current protection
Conditional over-voltage protection
Extensive fault detection and protections
Ultra compact package design 4*4mm 24-pin LFCSP
PMBus Compliant
Easy to use programming via Graphic User Interface (GUI)
High reliability EEPROM for programming & data storage
-40 °C ~ 125 °C operation temperature
APPLICATIONS
High density, Isolated DC/DC power supplies
Intermediate bus converters
High availability parallel power systems
Server, storage, industrial, networking, and communications
infrastructure
GENERAL DESCRIPTION
The ADP1051 is an advanced digital controller with PMBusTM
interface targeting high density, high efficiency DCDC power
conversion. This controller implements voltage mode control with
high speed, input line feed-forward for enhanced transient and
improved noise performance. The ADP1051 has 6 programmable
PWM outputs capable of controlling most high efficiency power
supply topologies with added control of synchronous rectification.
The device includes adaptive dead-time compensation to improve
the efficiency over the load range and programmable light load
mode operation combined with low device power consumption to
reduce system standby power losses.
The ADP1051 implements several features to enable a robust
system of parallel and redundant operation for customers that
require high availability or parallel connection. The device includes
master/slave synchronization, reverse current protection and pre-
bias start-up, accurate current sharing between power supplies and
conditional overvoltage techniques to identify and safely shutdown
an erroneous power supply in parallel operation mode.
The ADP1051 is based on flexible state machine architecture and is
register programmed using an intuitive, graphical-user interface.
The easy–to-use interface reduces design cycle time and results in a
robust, hardware coded system loaded into the built-in EEPROM.
The small size 4*4 mm LFCSP package makes the ADP1051 ideal
for ultra-compact, isolated DCDC power module or embedded
designs.
DC
INPUT
LOAD
DRIVER
DRIVER
iCoupler
SR1
CS1
SR2
VF
CS2- CS2+
OVP VS+ VS-
OUTA
ADP1051
OUTB
OUTC
OUTD
RES ADD RTD VCORE PG/ALT# CTRL SDA SCL
SYNI/FLGI
VDD
AGND
PMBUS
Figure 1. Typical Application Circuit
Rev. PrA
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2013 Analog Devices, Inc. All rights reserved.

1 page




ADP1051 pdf
Preliminary Technical Data
ADP1051
Parameter
Current Source (Low Side)
Temperature Coefficient
CS2 ADC
Valid Input Voltage Range
ADC Clock Frequency
Resolution
Measurement Accuracy
Low Side Mode with User
Trim
Symbol
High Side Mode with User
Trim
CS2 Accurate OCP
Threshold Accuracy
Speed
CS2 Reverse Current Comparator
Threshold Accuracy
Threshold Speed
RTD TEMPERATURE SENSE PIN
Input Voltage
Input Voltage FSR
Source Current
RTD ADC
Valid Input Voltage Range
ADC Clock Frequency
Register Update Rate
Resolution
Measurement Accuracy
Test Conditions/Comments
4.99 kΩ, 0.1% differential resistor
From 0 mV to 110 mV
From 110 mV to 120 mV
From 0 mV to 110 mV
From 110 mV to 120 mV
Same as ADC accuracy
When set to 7 bits averaging speed
When set to 9 bits averaging speed
−3 mV setting
−6 mV setting
−9 mV setting
−12 mV setting
−15 mV setting
−18 mV setting
−21 mV setting
−24 mV setting
Debounce = 40 ns
Voltage from RTD to AGND
When set to 46 μA, factory default setting
When set to 40 μA
When set to 30 μA
When set to 20 μA
When set to 10 μA
From 2% to 20% of valid input voltage
Min
180
0
-1
−1.85
−2.22
−6.1
−6.36
−1.6
−1.92
−5.3
−6.36
-8.5
-12.0
-15.5
-18.5
−22.0
−25.5
−28.5
−32
0
44.3
38.6
28.8
18.8
9.1
−0.3
Rev. PrA | Page 5 of 17
Typ Max Unit
230 280 μA
70 ppm/°C
120
1.56
12
+1
mV
MHz
Bits
mV
+2.1
+2.52
+1.5
+0.84
% FSR
mV
% FSR
mV
+2.3
+2.76
+0.7
+0.84
% FSR
mV
% FSR
mV
82 us
328 us
−3.00
−6
−9
−12
−15
−18
−21
−24
110
0
0
-2.9
-5.9
−8.0
−11.0
-14.0
−16.5
150
mV
mV
mV
mV
mV
mV
mV
mV
ns
1.6 V
1.6 V
46 47.3 μA
40 42 μA
30 31.7 μA
20 21.5 μA
10 11 μA
1.6 V
1.56 MHz
100 Hz
12 Bits
+0.45 % FSR

5 Page





ADP1051 arduino
Preliminary Technical Data
APPLICATION CONFIGURATIONS
ADP1051
DC
INPUT
DC
INPUT
LOAD
ADP3624/
ADP3654
ADuM3223/
ADuM4223
SR1
CS1
SR2
VF
CS2- CS2+
OVP
VS+ VS-
OUTA
OUTB
OUTC
OUTD
RES
ADD RTD
ADP1051
VCORE PG/ALT# CTRL SDA
SCL
SYNI/FLGI
VDD
AGND
PMBUS
Figure 4. Full Bridge Converter
LOAD
ADP3624/
ADP3654
ADuM3223/
ADuM4223
SR1
CS1
SR2
VF CS2- CS2+
OVP VS+ VS-
OUTA
OUTB
OUTC
OUTD
RES
ADP1051
SYNI/FLGI
ADD RTD VCORE
VDD
PG/ALT# CTRL SDA SCL AGND
PMBUS
Figure 5. Half Bridge Converter
Rev. PrA | Page 11 of 17

11 Page







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