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PDF W83527HG Data sheet ( Hoja de datos )

Número de pieza W83527HG
Descripción LPC I/O
Fabricantes nuvoton　
Logotipo nuvoton Logotipo



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No Preview Available ! W83527HG Hoja de datos, Descripción, Manual

W83527HG
Nuvoton LPC I/O
Date: December 25, 2009 Version: 1.5

1 page




W83527HG pdf
W83527HG
9.83 FANCTRL3 SMART FANTM III+ DC/PWM 1 Register - Index 5Bh (Bank 1) ...................... 79
9.84 FANCTRL3 SMART FANTM III+ DC/PWM 2 Register - Index 5Ch (Bank 1) ...................... 80
9.85 FANCTRL3 SMART FANTM III+ DC/PWM 3 Register - Index 5Dh (Bank 1) ...................... 80
9.86 FANCTRL3 SMART FANTM III+ input source & output FAN select Register - Index 5Eh
(Bank 1) ........................................................................................................................................... 80
9.87 Interrupt Status Register 3 - Index 50h (Bank 4) ................................................................ 81
9.88 SMI# Mask Register 4 - Index 51h (Bank 4)....................................................................... 81
9.89 Reserved Register - Index 52h (Bank 4) ............................................................................ 82
9.90 SYSTIN Temperature Sensor Offset Register - Index 54h (Bank 4) .................................. 82
9.91 CPUTIN Temperature Sensor Offset Register - Index 55h (Bank 4).................................. 82
9.92 Reserved Register - Index 57h-58h (Bank 4) ..................................................................... 83
9.93 Real Time Hardware Status Register I - Index 59h (Bank 4) ............................................. 83
9.94 Real Time Hardware Status Register II - Index 5Ah (Bank 4) ............................................ 83
9.95 Real Time Hardware Status Register III - Index 5Bh (Bank 4) ........................................... 84
9.96 Reserved Register - Index 5Ch ~ 5Fh (Bank 4) ................................................................. 84
9.97 Value RAM 2 ⎯ Index 50h-59h (Bank 5) ........................................................................... 85
9.98 SYSFANIN SPEED HIGH-BYTE VALUE (RPM) - Index 50h (Bank 6) .............................. 85
9.99 SYSFANIN SPEED LOW-BYTE VALUE (RPM) - Index 51h (Bank 6)............................... 85
9.100
CPUFANIN0 SPEED HIGH-BYTE VALUE (RPM) - Index 52h (Bank 6) ..................... 86
9.101
CPUFANIN0 SPEED LOW-BYTE VALUE (RPM) - Index 53h (Bank 6) ...................... 86
9.102
CPUFANIN1 SPEED HIGH-BYTE VALUE (RPM) - Index 56h (Bank 6) ..................... 86
9.103
CPUFANIN1 SPEED LOW-BYTE VALUE (RPM) - Index 57h (Bank 6) ...................... 87
9.104
FANOUT Configure register of PECI Error - Index 5Ah (Bank 6)................................. 87
9.105
FANCTRL2 pre-configured register for PECI error - Index 5Bh (Bank 6) .................... 87
9.106
FANCTRL4 pre-configured register for PECI error - Index 5Dh (Bank 6) .................... 88
9.107
FANCTRL5 pre-configured register for PECI error - Index 5Eh (Bank 6) .................... 88
9.108
FANCTRL3 pre-configured register for PECI error - Index 5Fh (Bank 6)..................... 88
10. KEYBOARD CONTROLLER..................................................................................................... 90
10.1 Output Buffer....................................................................................................................... 90
10.2 Input Buffer.......................................................................................................................... 90
10.3 Status Register ................................................................................................................... 91
10.4 Commands.......................................................................................................................... 91
10.5 Hardware GATEA20/Keyboard Reset Control Logic.......................................................... 93
10.5.1 KB Control Register ...................................................................................................................93
10.5.2 Port 92 Control Register ............................................................................................................94
11. POWER MANAGEMENT EVENT............................................................................................. 95
11.1 Power Control Logic............................................................................................................ 95
11.1.1 PSON# Logic.............................................................................................................................95
11.1.1.1. Normal Operation ............................................................................................................95
11.1.2 AC Power Failure Resume ........................................................................................................96
11.2 Wake Up the System by Keyboard and Mouse .................................................................. 97
11.2.1 Waken up by Keyboard events..................................................................................................97
11.2.2 Waken up by Mouse events ......................................................................................................98
11.3 Resume Reset Logic........................................................................................................... 99
11.4 PWROK Generation............................................................................................................ 99
11.4.1 The Relation between PWROK and ATXPGD.........................................................................100
Publication Release Date: Dec. 25, 2009
-IV- Version 1.5

5 Page





W83527HG arduino
W83527HG
• Nuvoton Hardware DoctorTM support
General Purpose I/O Ports
y 18 programmable general purpose I/O ports
y GP31 and GP35 can distinguish whether the input pins undergo any transitions by reading the
registers. Both GPIOs can assert PSOUT# to wake up the system if each of them undergoes
any transition.
OnNow Functions
y Keyboard Wake-Up by programmable keys
y Mouse Wake-Up by programmable buttons
y OnNow Wake-Up from all of the ACPI sleeping states (S1-S5)
PECI Interface
y Support PECI 1.0 and 1.1a Specifications
y Support 4 CPU addresses and 2 domains per CPU address
Package
y 48-pin LQFP
y Pb-free/RoHS
Publication Release Date: Dec. 25, 2009
-3- Version 1.5

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