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PDF FDD10N20LZ Data sheet ( Hoja de datos )

Número de pieza FDD10N20LZ
Descripción MOSFET ( Transistor )
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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FDD10N20LZ
N-Channel UniFETTM MOSFET
200 V, 7.6 A, 360 mΩ
Features
• RDS(on) = 300 mΩ (Typ.) @ VGS = 10 V, ID = 3.8 A
• Low Gate Charge (Typ. 12 nC)
• Low Crss (Typ. 11 pF)
• 100% Avalanche Tested
• Improved dv/dt Capability
• ESD Improved Capability
• RoHS Compliant
Applications
• Lighting
• Uninterruptible Power Supply
• AC-DC Power Supply
November 2013
Description
UniFETTM MOSFET is Fairchild Semiconductor’s high voltage
MOSFET family based on planar stripe and DMOS technology.
This MOSFET is tailored to reduce on-state resistance, and to
provide better switching performance and higher avalanche en-
ergy strength. This device family is suitable for switching power
converter applications such as power factor correction (PFC),
flat panel display (FPD) TV power, ATX and electronic lamp bal-
lasts.
D
G
S
D
D-PAK
G
S
MOSFET Maximum Ratings TC = 25oC unless otherwise noted.
Symbol
VDSS
VGSS
ID
IDM
EAS
IAR
EAR
dv/dt
PD
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current
Drain Current
- Continuous (TC = 25oC)
- Continuous (TC = 100oC)
- Pulsed
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation
(TC = 25oC)
- Derate Above 25oC
(Note 1)
(Note 2)
(Note 1)
(Note 1)
(Note 3)
TJ, TSTG
TL
Operating and Storage Temperature Range
Maximum Lead Temperature for Soldering, 1/8” from Case for 5 Seconds
Thermal Characteristics
Symbol
RθJC
RθJA
Parameter
Thermal Resistance, Junction to Case, Max.
Thermal Resistance, Junction to Ambient, Max.
FDD10N20LZTM
200
±20
7.6
4.5
30
121
7.6
8.3
4.5
83
0.7
-55 to +150
300
FDD10N20LZTM
1.5
110
Unit
V
V
A
A
mJ
A
mJ
V/ns
W
W/oC
oC
oC
Unit
oC/W
©2010 Fairchild Semiconductor Corporation
FDD10N20LZ Rev. C1
1
www.fairchildsemi.com

1 page




FDD10N20LZ pdf
IG = const.
Figure 12. Gate Charge Test Circuit & Waveform
V10GVS
VDS
VGS
RG
RL
VDD
VDS
90%
DUT
VGS 10%
td(on)
tr
t on
Figure 13. Resistive Switching Test Circuit & Waveforms
td(off)
tf
t off
VGS
Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms
©2010 Fairchild Semiconductor Corporation
FDD10N20LZ Rev. C1
5
www.fairchildsemi.com

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