PDF FCD5N60_F085 Data sheet ( Hoja de datos )

Número de pieza	FCD5N60_F085
Descripción	N-Channel SuperFET MOSFET
Fabricantes	Fairchild Semiconductor
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No Preview Available ! FCD5N60_F085 N-Channel SuperFET® MOSFET 600 V, 4.6 A, 1.1 Ω Features 600V, 4.6A, typ. Rds(on)=860mΩ@VGS=10V Ultra Low Gate Charge (Typ. Qg = 16 nC) UIS Capability RoHS Compliant Qualified to AEC Q101 Applications Automotive On Board Charger Automotive DC/DC Converter for HEV Description SuperFETTM is Fairchild’s proprietary new generation of high voltage MOSFETs utilizing an advanced charge balance mechanism for outstanding low on-resistance and lower gate charge performance. This advanced technology has been tailored to minimize conduction loss, provide superior switching performance, and withstand extreme dv/dt rate and higher avalanche energy. Consequently, SuperFET is suitable for various automotive DC/DC power conversion. July 2015 D D G G S DTO-P-2A5K2 (TO-252) S For current package drawing, please refer to the Fairchild web‐ site at http://www.fairchildsemi.com/package‐drawings/TO/ TO252A03.pdf. MOSFET Maximum Ratings TJ = 25°C unless otherwise noted. Symbol Parameter VDSS VGS ID Drain-to-Source Voltage Gate-to-Source Voltage Drain Current - Continuous (VGS=10) (Note 1) Pulsed Drain Current EAS Single Pulse Avalanche Energy PD Power Dissipation Derate Above 25oC TJ, TSTG RθJC RθJA Operating and Storage Temperature Thermal Resistance, Junction to Case Maximum Thermal Resistance, Junction to Ambient TC = 25°C TC = 25°C (Note 1) (Note 2) Ratings 600 ±30 4.6 See Figure 4 29 54 1.56 -55 to + 150 2.3 83 Units V V A mJ W W/oC oC oC/W oC/W Notes: 1: Starting TJ = 25°C, L = 10mH, IAS = 2.4A, VDD = 100V during inductor charging and VDD = 0V during time in avalanche. 2: RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance, where the case thermal reference is defined as the solder mounting surface presented here is of the based drain pins. RθJC is on mounting on a 1 guaranteed by design, in2 pad of 2oz copper. while RθJAis determined by the board design. The maximum rating Package Marking and Ordering Information Device Marking FCD5N60 Device FCD5N60_F085 Package D-PAK(TO-252) Reel Size 13” Tape Width 16mm Quantity 2500units ©2015 Fairchild Semiconductor Corporation FCD5N60_F085 Rev. 1.0 1 www.fairchildsemi.com 1 page Typical Characteristics 6 ID = 4.6A 5 PULSE DURATION = 80μs DUTY CYCLE = 0.5% MAX 4 3 TJ = 150oC 2 1 TJ = 25oC 0 56789 VGS, GATE TO SOURCE VOLTAGE (V) Figure 11. RDSON vs. Gate Voltage 10 3.0 PULSE DURATION = 80μs 2.5 DUTY CYCLE = 0.5% MAX 2.0 1.5 1.0 0.5 0.0 -80 ID = 4.6A VGS = 10V -40 0 40 80 120 TJ, JUNCTION TEMPERATURE(oC) 160 Figure 12. Normalized RDSON vs. Junction Temperature 1.4 VGS = VDS ID = 250μA 1.2 1.0 0.8 0.6 0.4 -80 -40 0 40 80 120 TJ, JUNCTION TEMPERATURE(oC) 160 Figure 13. Normalized Gate Threshold Voltage vs. Temperature 10000 1.2 ID = 1mA 1.1 1.0 0.9 0.8 -80 -40 0 40 80 120 TJ, JUNCTION TEMPERATURE (oC) 160 Figure 14. Normalized Drain to Source Breakdown Voltage vs. Junction Temperature Figure 16. 1000 Ciss 100 Coss 10 f = 1MHz VGS = 0V 1 0.1 1 Crss 10 100 1000 VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 15. Capacitance vs. Drain to Source Voltage ©2015 Fairchild Semiconductor Corporation FCD5N60_F085 Rev. 1.0 5 www.fairchildsemi.com 5 Page

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