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PDF FAN501A Data sheet ( Hoja de datos )

Número de pieza FAN501A
Descripción Offline DCM / CCM Flyback PWM Controller
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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April 2014
FAN501A
Offline DCM / CCM Flyback PWM Controller for
Charger Applications
Features
WSaver® Technology Provides Ultra-Low
Standby Power Consumption for Energy Stars
5-Star Level (<30 mW)
Constant-Current (CC) Control without
Secondary-Side Feedback Circuitry for
Discontinuous Conduction Mode (DCM) and
Continuous Conduction Mode (CCM)
Dual-Frequency Function Changes Switching
Frequency (140 kHz / 85 kHz) According to Input
Voltage to Maximize Transformer Utilization and
Improve Efficiency
High Power Density and High Conversion
Efficiency in CCM Compact Charger Applications
Frequency Hopping to Reduce EMI Noise
High-Voltage Startup
Precise Maximum Output Power Limit by CC
Regulation through External Resistor Adjustment
Peak-Current-Mode Control with Slope
Compensation to Avoid Sub-Harmonic Oscillation
Programmable Over-Temperature Protection with
Latch Mode through External NTC Resistor
Two-Level UVLO Reduces Input Power in Output
Short Situation
VS Over-Voltage Protection with Latch Mode
VDD Over-Voltage Protection with Auto Restart
Available in MLP 4 X 3 Package
Description
The advanced PWM controller, FAN501A, simplifies
isolated power supply design that requires CC
regulation of the output. The output current is
precisely estimated with only the information in the
primary side of the transformer and controlled with an
internal compensation circuit, removing the output
current-sensing loss and eliminating external CC
control circuitry. With an extremely low operating
current (250 µA), Burst Mode maximizes light-load
efficiency, allowing conformance to worldwide
Standby Mode efficiency guidelines.
Compared with a conventional approach using
external control circuit in the secondary side for CC
regulation, the FAN501A can reduce total cost,
component count, size, and weight; while increasing
efficiency, productivity, and system reliability.
Vo
Maximum
Typical
Minimum
Figure 1.
Io
Typical Output V-I Characteristic
Applications
Battery Chargers for Smart Phones, Feature
Phones, and Tablet PCs
AC-DC Adapters for Portable Devices or Battery
Chargers that Require CV / CC Control
Ordering Information
Part Number
FAN501AMPX
Operating
Temperature Range
-40C to +125C
Package
10-Lead, MLP, QUAD, JEDEC MO-220 4 mm x 3 mm,
0.8 mm Pitch, Single DAP
Packing
Method
Tape & Reel
© 2014 Fairchild Semiconductor Corporation
FAN501A • Rev. 1.0.0
www.fairchildsemi.com

1 page




FAN501A pdf
Electrical Characteristics
VDD=15 V and TJ=-40~125C unless noted.
Symbol
Parameter
Conditions
Min.
HV Section
VHV-MIN Minimum Startup Voltage on HV Pin
IHV Supply Current Drawn from HV Pin
IHV-LC Leakage Current Drawn from HV Pin
VDD Section
VDD-ON Turn-On Threshold Voltage
VDD-OFF Turn-Off Threshold Voltage
VDD-HVON Threshold Voltage for HV Startup
VDD-DLH Threshold Voltage for Latch Release
IDD-ST Startup Current
IDD-OP Operating Supply Current
IDD-Burst Burst Mode Operating Supply Current
VDD-OVP VDD Over-Voltage Protection Level
Oscillator Section
VHV=120 V, VDD=0 V
VHV=500 V, VDD=VDD-OFF+1 V
VDD Rising
VDD Falling
VDD=VDD-ON-0.16 V
VCS=5.0 V, VS=3 V, VFB=3 V,
VDD=15 V, CGATE=1 nF
VCS=0.3 V, VS=0 V, VFB=0 V
VDD=VDD-ONVDD-OVP10 V,
CGATE=1 nF
1.2
16.0
5.5
3.4
26.5
fOSC--H
Operating Frequency, IVS Below
Threshold IVS-L(Low Line)(4)
fOSC--L
Operating Frequency, IVS Over
Threshold IVS-H(High Line)(4)
ΔfHopping-H Frequency Hopping Range, High Line
ΔfHopping-L Frequency Hopping Range, Low Line
ΔtHopping Frequency Hopping Period
Feedback Input Section
VCS=5 V, VS=2.5 V, VFB=6 V 133
VCS=5 V, VS=2.5 V, VFB=4 V
79
VCS=0.5 V, VS=0.7 V, VFB=3 V ±5.5
VCS=0.5 V, VS=0.0 V, VFB=3 V ±2.5
ZFB FB Pin Input Impedance
AV Internal Voltage Attenuator of FB Pin
VFB-Open FB Pin Pull-Up Voltage
VFB-Burst-H
FB Threshold to Enable Gate Drive in
Burst Mode(4)
VFB-Burst-L
FB Threshold to Disable Gate Drive in
Burst Mode(4)
Over-Temperature Protection Section
FB Pin Open
VFB Rising with VCS=0.3 V,
VS=0 V
VFB Falling with VCS=0.3 V,
VS=0 V
36
5.00
1.60
1.55
TOTP Threshold Temperature for Over-Temperature Protection
Shutdown Function Section
ISD
VSD-TH
SD Pin Source Current
Threshold Voltage for Shutdown
Function Enable
VCS=0.3 V
VCS=0.3 V
85
0.85
Typ.
2.0
0.8
17.5
6.0
4.4
2.50
150
3.5
250
28.0
140
85
±7.0
±4.0
2.54
41
1/2.5
5.50
1.70
1.65
140
100
1.00
Max.
30
5.0
10.0
18.5
6.5
5.1
250
4.0
300
29.5
147
91
±8.5
±5.5
48
5.90
1.80
1.75
115
1.15
Unit
V
mA
μA
V
V
V
V
μA
mA
μA
V
kHz
kHz
kHz
kHz
ms
kΩ
V/V
V
V
V
C
μA
V
Continued on the following page…
© 2014 Fairchild Semiconductor Corporation
FAN501A • Rev. 1.0.0
5
www.fairchildsemi.com

5 Page





FAN501A arduino
operation range. It is typical to design the voltage divider
for the VS pin such that frequency change occurs at
170 VAC (VDC-170 VAC = 240 V); calculated as:
RVS1
NA / NP
IVS -H
240
(8)
With the value of RVS1 determined from Equation (8), the
switching frequency drops to 85 kHz as line voltage
increases above 170 VAC, while switching frequency
increases to 140 kHz, as line voltage drops <155 VAC.
IDS IDS
VDS
VDS
1/140kHz
Low line
1/140kHz
High line
(a) Single frequency operation
GATE
VAux
VS
- NA
NS
VBLK
0.5V
IDS IDS
tON
VDS
VDS
1/140kHz
Low line
1/85kHz
High line
(b) Dual frequency operation
Figure 24. Peak Switch Current, Single- and
Dual-Frequency Operation
Brownout Protection
Line voltage information is also used for brownout
protection. When the IVS current out of the VS pin during
the MOSFET conduction time is less than 160 μA for
longer than 30 ms, the brownout protection is triggered.
When setting RVS1 as calculated in Equation (8), the
brownout level is set at 30 VAC.
VBLK
Pri.
tS
Figure 26. Waveforms for Line Voltage Detection
Maximum Power Limit by Precision CC Control
Primary-side current-sensing voltage is used to estimate
the output current for CC regulation. However, the
actual output current regulation is also affected by the
turn-off delay of the MOSFET, as illustrated in Figure
27. While FAN501A samples the CS pin voltage at the
half on-time of gate drive signal, the actual turn-off is
delayed by the MOSFET gate charge and driving
current resulting in peak current detection error as:
IDS PK
VDL
Lm
tOFF .DLY
(9)
where Lm is the primary side magnetic inductance.
5V
IVS
GATE
NP
Line signal
Line Voltage
Detector
VAux Aux.
VS IVS
RVS1
NA
VS_Offset
RVS2
Figure 25. Line Voltage Detection Circuit
As can be seen, the error is proportional to the line
voltage. FAN501A has an internal correction function to
improve CC regulation, as shown in Figure 28. Line
information is obtained through the line voltage detector
as shown in Figure 25 and Figure 26 and this
information is used for the CC regulation correction. The
correction gain can be programmed using external
resistor RCOMP on the COMP pin. This correction
current, ILVF, flows through internal resistor, RLVF, and
external resistor, RCSF, to introduce offset voltage on
current sensing voltage. Thus, the primary current
detection error affected by line voltage and turn-off
delay is corrected for better CC regulation. The RCOMP
resistor can be calculated as:
RCOMP
NP
NA
RCS
RLVF + RCSF
RVS1
tOFF .DLY
Lm
KCOMP
(10)
© 2014 Fairchild Semiconductor Corporation
FAN501A • Rev. 1.0.0
where RLVF is the internal resistor on the IC, which is
2.0 kΩ, and KCOMP is the design factor of the IC, which
is 3.745 MΩ.
www.fairchildsemi.com
11

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