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PDF TC1724 Data sheet ( Hoja de datos )
| Número de pieza | TC1724 | |
| Descripción | 32-Bit Microcontroller | |
| Fabricantes | Infineon | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de TC1724 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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32-Bit
Microcontroller
TC1724
32-Bit Single-Chip Microcontroller
Data Sheet
V1.2 2014-06
Microcontrollers
1 page  
TC1724
5.4.3
5.4.4
5.5
Table of Contents
Flash Memory Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-78
Quality Declarations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-80
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-81
Data Sheet
I-2 V1.2, 2014-06
5 Page 
TC1724
Summary of Features
– Two General Purpose Timer (GPT12) modules
• 28 analog input lines for ADC
– 2 independent kernels (ADC0 and ADC1)
– Analog supply voltage range from 3.3 V to 5 V (single supply)
• 2 different FADC input channels
– channels with impedance control and overlaid with ADC1 inputs
– Extreme fast conversion, 21 cycles of fFADC clock
– 10-bit A/D conversion (higher resolution can be achieved by averaging of
consecutive conversions in digital data reduction filter)
• 95 digital general purpose I/O lines (GPIO)
• Digital I/O ports with 3.3 V capability
• On-chip debug support for OCDS Level 1 (CPU, PCP, DMA, On Chip Bus)
• Dedicated Emulation Device chip available (TC1724ED)
– multi-core debugging, real time tracing, and calibration
– four/five wire JTAG (IEEE 1149.1) or two wire DAP (Device Access Port) interface
• Power Management System
• Clock Generation Unit with PLL
Data Sheet
1-6 V1.2, 2014-06
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet TC1724.PDF ] | |
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