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Número de pieza SIS862DN
Descripción N-Channel 60V (D-S) MOSFET
Fabricantes Vishay 
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SIS862DN datasheet

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SIS862DN pdf
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
65
SiS862DN
Vishay Siliconix
52
39
Package Limited
26
13
0
0 25 50 75 100 125 150
TC - Case Temperature (°C)
Current Derating*
65 2.0
52 1.6
39 1.2
26 0.8
13 0.4
0
0 25 50 75 100 125 150
TC - Case Temperature (°C)
Power, Junction-to-Case
0.0
0
25 50 75 100 125
TA - Ambient Temperature (°C)
Power, Junction-to-Ambient
150
* The power dissipation PD is based on TJ(max.) = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper
dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package
limit.
Document Number: 63346
For technical questions, contact: pmostechsupport@vishay.com
www.vishay.com
S13-1265-Rev. A, 27-May-13
5
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

5 Page

SIS862DN arduino
AN822
Vishay Siliconix
TABLE 1: EQIVALENT STEADY STATE PERFORMANCE
Package
Configuration
SO-8
Single Dual
TSSOP-8
Single Dual
TSOP-8
Single Dual
Thermal Resiatance RthJC(C/W) 20 40 52 83 40 90
PPAK 1212
Single Dual
2.4 5.5
PPAK SO-8
Single Dual
1.8 5.5
PowerPAK 1212
49.8 °C
Standard SO-8
85 °C
Standard TSSOP-8
149 °C
TSOP-6
125 °C
2.4 °C/W
PC Board at 45 °C
20 °C/W
52 °C/W
Figure 4. Temperature of Devices on a PC Board
40 °C/W
THERMAL PERFORMANCE
Introduction
Spreading Copper
A basic measure of a device’s thermal performance is
the junction-to-case thermal resistance, Rθjc, or the
junction to- foot thermal resistance, Rθjf. This parameter
is measured for the device mounted to an infinite heat
sink and is therefore a characterization of the device
only, in other words, independent of the properties of the
object to which the device is mounted. Table 1 shows a
comparison of the PowerPAK 1212-8, PowerPAK SO-8,
standard TSSOP-8 and SO-8 equivalent steady state
performance.
By minimizing the junction-to-foot thermal resistance, the
MOSFET die temperature is very close to the tempera-
ture of the PC board. Consider four devices mounted on
a PC board with a board temperature of 45 °C (Figure 4).
Suppose each device is dissipating 2 W. Using the junc-
tion-to-foot thermal resistance characteristics of the
PowerPAK 1212-8 and the other SMT packages, die
temperatures are determined to be 49.8 °C for the Pow-
erPAK 1212-8, 85 °C for the standard SO-8, 149 °C for
standard TSSOP-8, and 125 °C for TSOP-6. This is a
4.8 °C rise above the board temperature for the Power-
PAK 1212-8, and over 40 °C for other SMT packages. A
4.8 °C rise has minimal effect on rDS(ON) whereas a rise
of over 40 °C will cause an increase in rDS(ON) as high
as 20 %.
Designers add additional copper, spreading copper, to
the drain pad to aid in conducting heat from a device. It
is helpful to have some information about the thermal
performance for a given area of spreading copper.
Figure 5 and Figure 6 show the thermal resistance of a
PowerPAK 1212-8 single and dual devices mounted on
a 2-in. x 2-in., four-layer FR-4 PC boards. The two inter-
nal layers and the backside layer are solid copper. The
internal layers were chosen as solid copper to model the
large power and ground planes common in many appli-
cations. The top layer was cut back to a smaller area and
at each step junction-to-ambient thermal resistance
measurements were taken. The results indicate that an
area above 0.2 to 0.3 square inches of spreading copper
gives no additional thermal performance improvement.
A subsequent experiment was run where the copper on
the back-side was reduced, first to 50 % in stripes to
mimic circuit traces, and then totally removed. No signif-
icant effect was observed.
Document Number 71681
03-Mar-06
www.vishay.com
3

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