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PDF LC05111CMT Datasheet ( Hoja de datos )

Número de pieza LC05111CMT
Descripción 1-Cell Lithium-Ion Battery Protection IC
Fabricantes ON Semiconductor 
Logotipo ON Semiconductor Logotipo
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LC05111CMT datasheet

1 Page

LC05111CMT pdf
LC05111CMT
SELECTION GUIDE
Device
Vov(V)
LC05111C01MTTTG 4.425
LC05111C02MTTTG 4.280
LC05111C03MTTTG 4.425
LC05111C04MTTTG 4.375
LC05111C05MTTTG 4.425
LC05111C06MTTTG 4.425
LC05111C07MTTTG 4.425
LC05111C08MTTTG 4.430
LC05111C09MTTTG 4.400
LC05111C10MTTTG 4.280
LC05111C11MTTTG 4.310
LC05111C12MTTTG 4.450
Vovr(V)
4.225
4.180
4.225
4.175
4.225
4.225
4.225
4.430
4.200
4.080
4.110
4.450
Vuv(V)
2.500
2.700
2.600
2.400
2.300
2.400
2.500
2.400
2.400
2.600
2.500
2.600
Vuvr(V)
2.500
2.700
2.600
2.400
2.300
2.400
2.520
2.450
2.400
2.600
2.500
2.600
Vuvr2(V)
2.900
2.900
3.000
2.800
2.700
2.800
2.900
2.800
3.000
3.000
2.900
3.000
AWUP
enable
enable
enable
enable
enable
enable
enable
enable
enable
enable
enable
enable
Ioc(A)
6.00
6.00
6.00
6.15
4.00
6.00
5.00
5.00
6.00
6.00
2.00
4.0
Ioch(A)
4.00
3.50
4.00
6.25
4.00
4.00
5.00
5.00
4.00
4.00
2.00
3.0
Ioc2(A)
17.5
21.5
17.5
17.5
17.5
17.5
17.5
17.5
17.5
17.5
17.5
15.0
0Vcharge
enable
enable
enable
enable
enable
enable
enable
enable
enable
enable
enable
enable
Pdmax-Ta graph
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LC05111CMT arduino
Continued from previous page
LC05111CMT
By continuing to be charged, if cell voltage will get higher than over-discharge detection voltage (Vuvr) over
the delay time of over-discharging (Tuvr), internal power MOS FETs as DCHG_SW is turned on and normal
mode will be resumed.
In over-discharge detection mode, charging over-current detection does not operate.
By continuing to be charged, charging over-current detection starts to operate after cell voltage goes up
more than over-discharge release voltage (Vuvr).
(4) Discharging over-current detection mode 1
Internal power MOS FET as DCHG_SW will be turned off and discharging current will be shut off if CS pin
voltage will get equal to or higher than discharging over-current detection current (Ioc) over the delay time
of discharging over-current (Toc1).
This is the discharging over-current detection mode 1.
In discharging over-current detection mode 1, CS pin will be pulled down to Vss with internal resistor Rcsd.
The recovery from discharging over-current detection mode will be made after the following two conditions
are satisfied.
a. Load is removed from IC.
b. CS pin voltage will get equal to or lower than discharging over-current release current (Iocr) over the
delay time of discharging over-current release (Tocr1) due to CS pin pulled down through Rcsd.
Consequently, internal power MOS FET as DCHG_SW will be turned on, and normal mode will be
resumed.
(5) Discharging over-current detection mode 2 (short circuit detection)
Internal power MOS FET as DCHG_SW will be turned off and discharging current will be shut off if CS pin
voltage will get equal to or higher than discharging over-current detection current2 (Ioc2) over the delay
time of discharging over-current 2 (Toc2).
This is the short circuit detection mode.
In short circuit detection mode, CS pin will be pulled down to Vss by internal resistor Rcsd.
The recovery from short circuit detection mode will be made after the following two conditions are satisfied.
a. Load is removed from IC.
b. CS pin voltage will get equal to or lower than discharging over-current release current (Iocr) over the
delay time of discharging over-current release (Tocr1) due to CS pin pulled down through Rcsd.
Consequently, internal power MOS FET as DCHG_SW will be turned on, and normal mode will be
resumed.
(6) Charging over-current detection mode
Internal power MOS FET as CHG_SW will be turned off and charging current will be shut off if CS pin
voltage will get equal to or lower than charging over-current detection current (Ioch) over the delay time of
charging over-current (Toch).
This is the charging over-current detection mode.
The recovery from charging over-current detection mode will be made after the following two conditions is
satisfied.
a. Charger is removed from IC and CS pin will get higher by load connected.
b. CS pin voltage will get equal to or higher than charging over-current release current (Iochr) over the
delay time of charging over-current release (Tocrh).
Consequently, internal power MOS FET as CHG_SW will be turned on, and normal mode will be resumed.
*Internal current flows out through CS and S2 terminals.
After charger is removed, it flows through parasitic diode of CHG_SW FET.
Therefore, CS pin voltage will go up more than charging over-current release current (Iochr).
So CS pin voltage is not an indispensable condition for recovery from charging over-current detection.
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