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Número de pieza | PCS3P622Z05C | |
Descripción | Peak EMI Reduction IC | |
Fabricantes | ON Semiconductor | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de PCS3P622Z05C (archivo pdf) en la parte inferior de esta página. Total 13 Páginas | ||
No Preview Available ! PCS3P622Z05B,
PCS3P622Z05C,
PCS3P622Z09B,
PCS3P622Z09C
Product Preview
Low Frequency
TIMING SAFEt Peak EMI
Reduction IC
Description
PCS3P622Z05/09 is a versatile, 3.3 V Zero−delay buffer designed
to distribute low frequency Timing−Safe clocks with Peak EMI
reduction. PCS3P622Z05 is an eight−pin version, accepts one
reference input and drives out five low−skew Timing−Safe clocks.
PCS3P622Z09 accepts one reference input and drives out nine
low−skew Timing−Safe clocks.
PCS3P622Z05/09 has a DLY_CTRL for adjusting the Input−Output
clock delay, depending upon the value of capacitor connected at this
pin to GND.
PCS3P622Z05/09 operates from a 3.3 V supply and is available in
two different packages, as shown in the ordering information table,
over commercial and Industrial temperature range.
Application
PCS3P622Z05/09 is targeted for use in Displays and memory
interface systems.
Features
• Low Frequency Clock Distribution with Timing−Safe Peak EMI
Reduction
• Input Frequency Range: 4 MHz − 20 MHz
• Multiple Low Skew Timing−Safe Outputs:
PCS3P622Z05: 5 Outputs
PCS3P622Z09: 9 Outputs
• External Input−Output Delay Control Option
• Supply Voltage: 3.3 V ± 0.3 V
• Commercial and Industrial Temperature Range
• Packaging Information:
ASM3P622Z05: 8 pin SOIC, and TSSOP
ASM3P622Z09: 16 pin SOIC, and TSSOP
• True Drop−in Solution for Zero Delay Buffer, ASM5P2305A / 09A
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
This document contains information on a product under development. ON Semiconductor
reserves the right to change or discontinue this product without notice.
http://onsemi.com
TSSOP−8
T SUFFIX
CASE 948AL
SOIC−8
S SUFFIX
CASE 751BD
TSSOP−16
T SUFFIX
CASE 948AN
SOIC−16
S SUFFIX
CASE 751BG
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 13 of this data sheet.
© Semiconductor Components Industries, LLC, 2011
August, 2011 − Rev. P2
1
Publication Order Number:
PCS3P622Z05/D
1 page PCS3P622Z05B, PCS3P622Z05C, PCS3P622Z09B, PCS3P622Z09C
Table 3. SELECT INPUT DECODING TABLE FOR PCS3P622Z09
S2
S1
CLKOUT A1 − A4
CLKOUT B1 − B4
DLY_CTRL (Note 9) Output Source
PLL Shut−Down
00
Three−state
Three−state
Driven
PLL
N
01
Driven
Three−state
Driven
PLL
N
10
Driven
Driven
Driven
Reference
Y
11
Driven
Driven
Driven
PLL
N
9. This output is driven and has an internal feedback for the PLL. The load on this output can be adjusted to change the skew between the
reference and the Output.
Table 4. SPREAD SPECTRUM CONTROL AND INPUT−OUTPUT SKEW TABLE
Frequency (MHz)
Device
Deviation (+%)
Input−Output Skew (+TSKEW) (Note 10)
12 PCS3P622Z05B / 09B
0.25
0.0625
PCS3P622Z05C / 09C
10. TSKEW is measured in units of the Clock Period.
0.5
0.125
Table 5. ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
VDD
Supply Voltage to Ground Potential
Rating
−0.5 to +4.6
Unit
V
VIN DC Input Voltage (CLKIN)
−0.5 to +7
TSTG
Storage temperature
−65 to +125
°C
Ts Max. Soldering Temperature (10 sec)
260 °C
TJ Junction Temperature
150 °C
TDV Static Discharge Voltage (As per JEDEC STD22− A114−B)
2 KV
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
Table 6. OPERATING CONDITIONS
Parameter
Description
VDD
Supply Voltage
TA Operating Temperature (Ambient Temperature)
CL Load Capacitance
CIN Input Capacitance
Min Max Unit
3.0 3.6 V
−40 +85 °C
30 pF
7 pF
http://onsemi.com
5
5 Page PCS3P622Z05B, PCS3P622Z05C, PCS3P622Z09B, PCS3P622Z09C
PIN#1 IDENTIFICATION
TOP VIEW
PACKAGE DIMENSIONS
SOIC−16, 150 mils
CASE 751BG−01
ISSUE O
E1 E
SYMBOL
A
A1
b
c
D
E
E1
e
h
L
θ
MIN
1.35
0.10
0.33
0.19
9.80
5.80
3.80
0.25
0.40
0º
NOM
9.90
6.00
3.90
1.27 BSC
MAX
1.75
0.25
0.51
0.25
10.00
6.20
4.00
0.50
1.27
8º
Dh
A
eb
SIDE VIEW
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MS-012.
q
L
A1
END VIEW
c
http://onsemi.com
11
11 Page |
Páginas | Total 13 Páginas | |
PDF Descargar | [ Datasheet PCS3P622Z05C.PDF ] |
Número de pieza | Descripción | Fabricantes |
PCS3P622Z05B | Low Frequency Timing-Safe Peak EMI reduction IC | PulseCore Semiconductor |
PCS3P622Z05B | Peak EMI Reduction IC | ON Semiconductor |
PCS3P622Z05C | Low Frequency Timing-Safe Peak EMI reduction IC | PulseCore Semiconductor |
PCS3P622Z05C | Peak EMI Reduction IC | ON Semiconductor |
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