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PDF TCC-202 Data sheet ( Hoja de datos )
| Número de pieza | TCC-202 | |
| Descripción | Two-Output PTIC Control IC | |
| Fabricantes | ON Semiconductor | |
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TCC-202
Two-Output PTIC Control IC
Introduction
TCC−202 is a two−output high−voltage digital to analog control IC
specifically designed to control and bias ON Semiconductor’s Passive
Tunable Integrated Circuits (PTICs).
These tunable capacitor control circuits are intended for use in
mobile phones and dedicated RF tuning applications. The
implementation of ON Semiconductor’s tunable circuits in mobile
phones enables significant improvement in terms of antenna radiated
performance.
The tunable capacitors are controlled through a bias voltage ranging
from 1 V to 24 V. The TCC−202 high−voltage PTIC control IC has
been specifically designed to cover this need, providing two
independent high−voltage outputs that control up to two different
tunable PTICs in parallel. The device is fully controlled through a
MIPI interface.
Key Features
• Controls ON Semiconductor’s PTIC Tunable Capacitors
• Compliant with Timing Needs of Cellular and Other Wireless System
Requirements
• Integrated Boost Converter with 2 Programmable DAC Outputs
(up to 24 V)
• Low Power Consumption
• MIPI−RFFE Interface
• Compliant with MIPI 26 MHz Read−back
• Available in WLCSP (RDL ball arrays)
• This is a Pb−Free Device
Typical Applications
• Multi−band, Multi−standard, Advanced and Simple Mobile Phones
• Tunable Antenna Matching Networks
• Compatible with Closed−loop and Open−loop Antenna Tuner
Applications
www.onsemi.com
WLCSP12
CASE 567KZ
MARKING DIAGRAM
XXXX
ALYW
G
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information on page 21 of
this data sheet.
© Semiconductor Components Industries, LLC, 2015
November, 2015 − Rev. 2
1
Publication Order Number:
TCC−202/D
1 page  
TCC−202
Table 5. BOOST CONVERTER CHARACTERISTICS
(AVDD from 2.3 V to 5.5 V; VIO from 1.62 V to 1.98 V; TA = –30 to +85°C; CHV = 47 nF; LBOOST = 15 mH; unless otherwise specified)
Symbol
Parameter
Conditions
Min Typ Max
Unit
VHV_min
Minimum programmable output volt-
age (average), DAC Boost = 0h
Active mode
− 13 −
V
VHV_max
Maximum programmable output volt-
age (average), DAC Boost = Fh
Active mode
− 28 −
Resolution
Boost voltage resolution
4−bit DAC
− 1−
IL_BOOST_LIMIT Inductor current limit
− 200 −
mA
Table 6. ANALOG OUTPUTS (OUT A, OUT B)
(AVDD from 2.3 V to 5.5 V; VIO from 1.62 V to 1.98 V; VHV = 26 V; TA = –30 to +85°C; Rload = ∞ unless otherwise specified)
Parameter
Description
Min Typ Max
Unit
Comment
SHUTDOWN MODE
ZOUT
OUT A, OUT B output impedance
7
−
−
MW DAC disabled
ACTIVE MODE
VOH Maximum output voltage
VOL Minimum output voltage
Slew Rate
− 23.8 −
−−1
− 3 10
V DAC A, B = 7Fh,
DAC Boost = Fh, IOH < 10 mA
V DAC A, B = 01h, DAC
Boost = 0h to Fh, IOH < 10 mA
ms 2 V to 24 V step, measured at
VOUT = 15.2 V,
RLOAD = equivalent series load of
2.7 kW and 5.6 nF, Turbo enabled
RPD OUT A, OUT B set in pull−down
mode
− − 1000 W DAC A, B = 00h, DAC Boost = 0h to
Fh, selected output(s) is disabled
Resolution Voltage resolution (1−bit)
− 188 −
mV (1 LSB = 1−bit)
VOFFSET Zero scale, least squared best fit −1 − +1 LSB
Error
−3.0
−
+3.0
%VOUT Over 2 V – 24 V VO range
DNL
Differential non−linearity least
squared best fit
−0.9 − +0.9 LSB Over 2 V – 24 V VO range
INL
Integral non−linearity least squared
−1
−
+1
LSB Over 2 V – 24 V VO range
best fit
ISC
VRIPPLE
Over current protection
Output ripple with all outputs at
steady state
− 5 65 mA Any DAC output shorted to ground
− − 40 mV RMS Over 2 V – 24 V for VHV = 23.5 V
www.onsemi.com
5
5 Page 
TCC−202
Table 10. MIPI RFFE INTERFACE SPECIFICATION
(TA = −30 to +85°C; 2.3 V < VDDA < 5.5 V; 1.62 < VIO < 1.98 V; unless otherwise specified)
Parameter
Description
Min Typ Max Unit
FSCLK
Clock Full−Speed
Frequency
0.032
−
26 MHz
TSCLK
Clock Full−Speed Period
0.038
−
32
ms
TSCLKIH
CLK Input High Time
11.25
−
−
ns
TSCLKIL
CLK Input Low Time
11.25
−
−
ns
TDSETUP
Write DATA Setup Time
−1
−
1
ns
TDHOLD
Write DATA Hold Time
−5 − 5 ns
TREAD_ACCESS Read DATA valid from
CLK rising edge
− − 7.11 ns
TREAD_ACCESS Read DATA valid from
CLK rising edge
− − 9.11 ns
Comments
Full−Speed Operation:
1.62 V< VIO < 1.98 V
Full−Speed Operation:
1.62 V< VIO < 1.98 V
Full−Speed
Full−Speed
Full−Speed
Full−Speed
Full Speed at VIO = 1.80 V,
= 25°C and max 15 pF load on
DATA pin
Full Speed at VIO = 1.80 V,
= 25°C and max 50 pF load on
DATA pin
The control IC contains thirteen 8−bit registers. Register content is described in Table 11. Some additional registers
implemented as provision, are not described in this document.
Table 11. MIPI RFFE ADDRESS MAP
Register
Address
Description
Purpose
Access
Type
Size (bits)
0x00
DAC Configuration (Enable Mask)
High voltage output enable mask
Write
7
0x01
Turbo Register DAC A, B
Turbo−charge configuration DAC A, B (Note 2)
Write
8
0x02
DAC A Register
OUT A value [6:0]
Write
8
0x03
DAC B Register
OUT B value [6:0]
Write
8
0x09
Wake Up
Wake−Up Controls
Write
8
0x10
Boost Voltage (VHV)
Settings for the boost high voltage
Write
8
0x12
Turbo−Charge Delay DAC A, B
Turbo−charge delay steps
DAC A, B
Write
8
0x13
Turbo−Charge Delay DAC A, B
Turbo−charge delay, multiplication
DAC A, B
Write
8
0x1A
MIPI−RFFE STATUS
Detect MIPI protocol errors
Read/Write
8
0x1B
RFFE Group SID
MIPI RFFE group slave
Write
8
0x1C
Power Mode and Trigger Register
Power mode & trigger control
Write
8
0x1D
Product ID Register
Product number (Notes 3 and 5)
Write
8
0x1E
Manufacturer ID Register
MN (10 bits long)
Manufacturer ID[7:0] (Note 4)
Write
8
0x1F
Unique Slave Identifier Register (USID) Spare [7:6]
[5,4] = Manufacturer ID [9:8]
Write
8
0x2C
Glide Timer Settings
[6:5] Turbo and Glide control / [4:0] Glide Timer
setting / Need extended write for this register
Write
8
2. The details for configuration of Turbo mode should be ascertained from the Programming Guide, available from ON Semiconductor.
3. The two least significant bits from Product ID register are programmed in OTP during manufacture. The other six bits of Product ID are
hardcoded in ASIC.
4. Manufacture ID is hardcoded in ASIC, and mapped in a READ−only register, not programmed in OTP.
5. TCC−202 supports WRITE access to Product ID, only in respect to comply with MIPI RFFE specification 6.8.3, Programmable USID”, of
MIPI Alliance Specification for RF Front−End Control Interface (RFFE) Version 1.00.00 26 July 2011.
www.onsemi.com
11
11 Page | ||
| Páginas | Total 23 Páginas | |
| PDF Descargar | [ Datasheet TCC-202.PDF ] | |
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