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Número de pieza | IR3502 | |
Descripción | CONTROL IC | |
Fabricantes | International Rectifier | |
Logotipo | ||
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DATA SHEET
XPHASE3TM CONTROL IC
DESCRIPTION
The IR3502 control IC combined with an XPHASE3TM Phase IC provides a full featured and flexible way to
implement a complete VR11.0 and VR11.1 power solution. The IR3502 provides overall system control
and interfaces with any number of Phase ICs, each driving and monitoring a single phase. The XPhase3TM
architecture results in a power supply that is smaller, less expensive, and easier to design while providing
higher efficiency than conventional approaches.
FEATURES
• 1 to X phase operation with matching Phase IC
• 0.5% overall system set point accuracy
• Daisy-chain digital phase timing provides accurate phase interleaving without external components
• Programmable 250kHz to 9MHz clock oscillator frequency provides per phase switching frequency of
250kHz to 1.5MHz
• Programmable Dynamic VID Slew Rate
• Programmable VID Offset or No Offset
• Programmable Load Line Output Impedance
• High speed error amplifier with wide bandwidth of 30MHz and fast slew rate of 10V/us
• Programmable constant converter output current limit during soft start
• Hiccup over current protection with delay during normal operation
• Central over voltage detection and latch with programmable threshold and communication to phase ICs
• Over voltage signal output to system with overvoltage detection during powerup and normal operation
• Load current reporting
• Single NTC thermistor compensation for correct current reporting, OC Threshold, and Droop
• Detection and protection of open remote sense line
• Open control loop protection
• IC bias linear regulator controller
• Programmable VRHOT function monitors temperature of power stage through a NTC thermistor
• Remote sense amplifier with true converter voltage sensing
• Simplified VR Ready (VRRDY) output provides indication of proper operation
• Small thermally enhanced 32L 5mm x 5mm MLPQ package
• RoHS compliant
ORDERING INFORMATION
Device
IR3502MTRPBF
* IR3502MPBF
Package
32 Lead MLPQ
(5 x 5 mm body)
32 Lead MLPQ
(5 x 5 mm body)
Order Quantity
3000 per reel
100 piece strips
• Samples only
Page 1 of 39
July 28, 2009
1 page IR3502
PARAMETER
TEST CONDITION
Source Current
0.5V ≤ V(IMON) ≤ 0.9V
Sink Resistance
0.5V ≤ V(IMON) ≤ 0.9V
Unity Gain Bandwidth
Note 1
Input Filter Time Constant
Max Output Voltage
Soft Start and Delay
Start Delay (TD1)
Soft Start Time (TD2)
VID Sample Delay (TD3)
VRRDY Delay (TD4 + TD5)
OC Delay Time
V(VDRP) – V(DACBUFF) = 1.67 mV
SS/DEL to FB Input Offset With FB = 0V, adjust V(SS/DEL) until
Voltage
EAOUT drives high
Charge Current
Discharge Current
Charge/Discharge Current Ratio
Charge Voltage
Delay Comparator Threshold
Relative to Charge Voltage, SS/DEL rising
Delay Comparator Threshold
Relative to Charge Voltage, SS/DEL falling
Delay Comparator Input Filter
Delay Comparator Hysteresis
VID Sample Delay Comparator
Threshold
Discharge Comp. Threshold
Remote Sense Differential Amplifier
Unity Gain Bandwidth
Note 1
Input Offset Voltage
0.5V≤ V(VOSEN+) - V(VOSEN-) ≤ 1.6V
Sink Current
0.5V≤ V(VOSEN+) - V(VOSEN-) ≤ 1.6V
Source Current
0.5V≤ V(VOSEN+) - V(VOSEN-) ≤ 1.6V
Slew Rate
0.5V≤ V(VOSEN+) - V(VOSEN-) ≤ 1.6V
VOSEN+ Bias Current
0.5 V < V(VOSEN+) < 1.6V
VOSEN- Bias Current
-0.3V ≤ VOSEN- ≤ 0.3V, All VID Codes
High Voltage
V(VCCL) – V(VO)
Low Voltage
V(VCCL)=7V
Error Amplifier
Input Offset Voltage
Measure V(FB) – V(VSETPT). Note 2
FB Bias Current
VSETPT Bias Current
ROSC= 24.5 KΩ
DC Gain
Note 1
Bandwidth
Note 1
Slew Rate
Note 1
Sink Current
Source Current
Maximum Voltage
Measure V(VCCL) – V(EAOUT)
Page 5 of 39
MIN
5
5
1.04
1.0
0.8
0.3
0.5
75
0.7
35.0
2.5
10
3.6
50
85
10
2.8
150
3.0
-3
0.4
3
2
1.5
-1
-1
23.00
100
20
7
0.40
5
500
TYP
9
10
1
1
1.09
MAX
15
17
1.145
2.9
2.2
1.2
1.2
125
1.4
52.5
4.5
12
4.0
80
120
5
30
3.0
200
3.5
3.25
3.0
2.3
300
1.9
70.0
6.5
16
4.2
125
160
60
3.2
275
6.4 9.0
03
12
9 20
48
100
160 275
2 2.5
50
01
01
24.25 25.50
110 120
30 40
12 20
0.85 1.00
8 12
780 950
July 28, 2009
UNIT
mA
kΩ
MHz
µs
V
ms
ms
ms
ms
us
V
µA
µA
µA/µA
V
mV
mV
µs
mV
V
mV
MHz
mV
mA
mA
V/us
µA
µA
V
mV
mV
µA
µA
dB
MHz
V/µs
mA
mA
mV
5 Page IR3502
PHASE IC
CLOCK
PULSE
EAIN
PWMRMP
VDAC
GATEH
GATEL
STEADY-STATE
OPERATION
DUTY CYCLE INCREASE
DUE TO LOAD
INCREASE
DUTY CYCLE DECREASE
DUE TO VIN INCREASE
(FEED-FORWARD)
DUTY CYCLE DECREASE DUE TO LOAD
DECREASE (BODY BRAKING) OR FAULT
(VCCLUV, OCP, VID=11111X)
STEADY-STATE
OPERATION
Body BrakingTM
Figure 5 PWM Operating Waveforms
In a conventional synchronous buck converter, the minimum time required to reduce the current in the inductor in
response to a load step decrease is;
TSLEW
=
L * (IMAX − IMIN )
VO
The slew rate of the inductor current can be significantly increased by turning off the synchronous rectifier in
response to a load step decrease. The switch node voltage is then forced to decrease until conduction of the
synchronous rectifier’s body diode occurs. This increases the voltage across the inductor from Vout to Vout +
VBODYDIODE. The minimum time required to reduce the current in the inductor in response to a load transient
decrease is now;
TSLEW
=
L * (IMAX − IMIN )
VO + VBODYDIODE
Since the voltage drop in the body diode is often comparable to the output voltage, the inductor current slew rate
can be increased significantly. This patented technique is referred to as “body braking” and is accomplished through
the “body braking comparator” located in the phase IC. If the error amplifier’s output voltage drops below the output
voltage of the share adjust amplifier in the phase IC, this comparator turns off the low side gate driver, enabling the
bottom FET body diode to take over. There is 100mV upslope and 200mV down slope hysteresis for the body
braking comparator.
Lossless Average Inductor Current Sensing
Inductor current can be sensed by connecting a series resistor and a capacitor network in parallel with the inductor
and measuring the voltage across the capacitor, as shown in Figure 6. The equation of the sensing network is,
vC
(s)
=
vL
(s)
1
+
1
sRCS CCS
=
iL
(s)
1
RL + sL
+ sRCSCCS
Usually the resistor Rcs and capacitor Ccs are chosen, such that, the time constant of Rcs and Ccs equals the time
constant of the inductor, which is the inductance L over the inductor DCR RL. If the two time constants match, the
voltage across Ccs is proportional to the current through L, and the sense circuit can be treated as if only a sense
Page 11 of 39
July 28, 2009
11 Page |
Páginas | Total 30 Páginas | |
PDF Descargar | [ Datasheet IR3502.PDF ] |
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