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PDF NCP45526 Data sheet ( Hoja de datos )
| Número de pieza | NCP45526 | |
| Descripción | Advanced Load Management | |
| Fabricantes | ON Semiconductor | |
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NCP45526
ecoSWITCHt
Advanced Load Management
Controlled Load Switch with Low RON
The NCP45526 load switch provides a component and
area-reducing solution for efficient power domain switching with
inrush current limit via soft start. This device is designed to integrate
control and driver functionality with a high performance low
on−resistance power MOSFET in a single package. This cost effective
solution is ideal for power management and hot-swap applications
requiring low power consumption in a small footprint.
Features
• Advanced Controller with Charge Pump
• Integrated N-Channel MOSFET with Low RON
• Input Voltage Range 0.5 V to 6 V
• Soft-Start via Controlled Slew Rate
• Power Good Signal
• Extremely Low Standby Current
• Load Bleed (Quick Discharge)
• This is a Pb−Free Device
Typical Applications
• Portable Electronics and Systems
• Notebook and Tablet Computers
• Telecom, Networking, Medical, and Industrial Equipment
• Set−Top Boxes, Servers, and Gateways
• Hot−Swap Devices and Peripheral Ports
VCC
EN PG
VIN
Bandgap
&
Biases
Control
Logic
Charge
Pump
Delay and
Slew Rate
Control
GND
BLEED
Figure 1. Block Diagram
VOUT
http://onsemi.com
RON TYP
18.0 mW
18.8 mW
VCC
3.3 V
3.3 V
VIN
1.8 V
5.0 V
IMAX
6A
1
DFN8, 2x2
CASE 506CC
MARKING DIAGRAM
1
XX MG
G
XX = 4H for NCP45526−H
= 4L for NCP45526−L
M = Date Code
G = Pb−Free Package
(Note: Microdot may be in either location)
PIN CONFIGURATION
VIN 1
EN 2
VCC 3
GND 4
9: VIN
(Top View)
8 VOUT
7 VOUT
6 PG
5 BLEED
ORDERING INFORMATION
See detailed ordering and shipping information on page 9 of
this data sheet.
© Semiconductor Components Industries, LLC, 2014
September, 2014 − Rev. 2
1
Publication Order Number:
NCP45526/D
1 page  
NCP45526
APPLICATIONS INFORMATION
Enable Control
The NCP45526 has two part numbers, NCP45526-H and
NCP45526-L, that only differ in the polarity of the enable
control.
The NCP45526-H device allows for enabling the
MOSFET in an active-high configuration. When the VCC
supply pin has an adequate voltage applied and the EN pin
is at a logic high level, the MOSFET will be enabled.
Similarly, when the EN pin is at a logic low level, the
MOSFET will be disabled. An internal pull down resistor to
ground on the EN pin ensures that the MOSFET will be
disabled when not being driven.
The NCP45526-L device allows for enabling the
MOSFET in an active-low configuration. When the VCC
supply pin has an adequate voltage applied and the EN pin
is at a logic low level, the MOSFET will be enabled.
Similarly, when the EN pin is at a logic high level, the
MOSFET will be disabled. An internal pull up resistor to
VCC on the EN pin ensures that the MOSFET will be
disabled when not being driven.
Power Sequencing
The NCP45526 device will function with any power
sequence, but the output turn−on delay performance may
vary from what is specified. To achieve the specified
performance, there are two recommended power sequences:
1) VCC → VIN → VEN
2) VIN → VCC → VEN
Load Bleed (Quick Discharge)
The NCP45526 device has an internal bleed resistor,
RBLEED, which is used to bleed the charge off of the load to
ground after the MOSFET has been disabled. In series with
the bleed resistor is a bleed switch that is enabled whenever
the MOSFET is disabled. The MOSFET and the bleed
switch are never concurrently active.
Is it required that the BLEED pin be connected to VOUT
either directly (as shown in Figure 4) or through an external
resistor, REXT (as shown in Figure 3). REXT should not
exceed 100 MW and can be used to increase the total bleed
resistance and decrease the load bleed rate.
Care must be taken to ensure that the power dissipated
across RBLEED is kept at a safe level. The maximum
continuous power that can be dissipated across RBLEED is
0.4 W. REXT can be used to decrease the amount of power
dissipated across RBLEED.
Power Good
The NCP45526 devices have a power good output (PG)
that can be used to indicate when the gate of the MOSFET
is fully charged. The PG pin is an active-high, open-drain
output that requires an external pull up resistor, RPG, greater
than or equal to 1 kW to an external voltage source, VTERM,
that is compatible with input levels of all devices connected
to this pin (as shown in Figures 3 and 4).
The power good output can be used as the enable signal for
other active−high devices in the system (as shown in
Figure 5). This allows for guaranteed by design power
sequencing and reduces the number of enable signals needed
from the system controller. If the power good feature is not
used in the application, the PG pin should be tied to GND.
Slew Rate Control
The NCP45526 devices are equipped with controlled
output slew rate which provides soft start functionality. This
limits the inrush current caused by capacitor charging and
enables these devices to be used in hot swap applications.
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| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet NCP45526.PDF ] | |
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