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PDF K4S560432N Data sheet ( Hoja de datos )
| Número de pieza | K4S560432N | |
| Descripción | 256Mb N-die SDRAM | |
| Fabricantes | Samsung semiconductor | |
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Rev. 1.0, Apr. 2010
K4S560432N
K4S560832N
K4S561632N
256Mb N-die SDRAM
54TSOP(II) with Lead-Free & Halogen-Free
(RoHS compliant)
datasheet
SAMSUNG ELECTRONICS RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND
SPECIFICATIONS WITHOUT NOTICE.
Products and specifications discussed herein are for reference purposes only. All information discussed
herein is provided on an "AS IS" basis, without warranties of any kind.
This document and all information discussed herein remain the sole and exclusive property of Samsung
Electronics. No license of any patent, copyright, mask work, trademark or any other intellectual property
right is granted by one party to the other party under this document, by implication, estoppel or other-
wise.
Samsung products are not intended for use in life support, critical care, medical, safety equipment, or
similar applications where product failure could result in loss of life or personal or physical harm, or any
military or defense application, or any governmental procurement to which special terms or provisions
may apply.
For updates or additional information about Samsung products, contact your nearest Samsung office.
All brand names, trademarks and registered trademarks belong to their respective owners.
ⓒ 2010 Samsung Electronics Co., Ltd. All rights reserved.
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1 page  
K4S560432N
K4S560832N
K4S561632N
datasheet
4. PACKAGE PHYSICAL DIMENSION
#54 #28
Rev. 1.0
SDRAM
Unit : mm
#1
(1.50)
(R 0.15)
22.22 ± 0.10
(0.71)
0.80TYP
[0.80 ± 0.08]
Detail A
#27
(10°)
Detail B
(10°)
0.125
+0.075
- 0.035
0.10 MAX
[ 0.075 MAX
NOTE :
1. ( ) IS REFERENCE
2. [ ] IS ASS’Y OUT QUALITY
Detail A
Detail B
0.30
+0.10
- 0.05
0.35
+0.10
- 0.05
Figure 1. 54Pin TSOP(II) Package Dimension
0.25TYP
(0° ∼ 8°)
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5 Page 
K4S560432N
K4S560832N
K4S561632N
datasheet
13. AC OPERATING TEST CONDITIONS
Parameter
Input levels (Vih/Vil)
Input timing measurement reference level
Input rise and fall time
Output timing measurement reference level
Output load condition
Value
2.4/0.4
1.4
tr/tf = 1/1
1.4
See Figure 3
Rev. 1.0
SDRAM
(VDD = 3.3V ± 0.3V, TA = 0 to 70°C)
Unit
V
V
ns
V
Output
870Ω
3.3V
1200Ω
50pF
VOH (DC) = 2.4V, IOH = -2mA
VOL (DC) = 0.4V, IOL = 2mA
Figure 2. DC output load circuit
Output
Z0 = 50Ω
Vtt = 1.4V
50Ω
50pF
Figure 3. AC output load circuit
- 11 -
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet K4S560432N.PDF ] | |
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