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PDF ATF-331M4 Data sheet ( Hoja de datos )

Número de pieza ATF-331M4
Descripción Low Noise Pseudomorphic HEMT
Fabricantes AVAGO 
Logotipo AVAGO Logotipo



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ATF-331M4
Low Noise Pseudomorphic HEMT
in a Miniature Leadless Package
Data Sheet
Description
Avago Technologies’s ATF-331M4 is a high linearity, low
noise pHEMT housed in a miniature leadless package.
The ATF-331M4’s small size and low profile makes it
ideal for the design of hybrid modules and other space-
constraint devices.
Based on its featured performance, ATF-331M4 is ideal for
the first or second stage of base station LNA due to the
excellent combination of low noise figure and enhanced
linearity[1]. The device is also suitable for applications
in Wireless LAN, WLL/RLL, MMDS, and other systems
requiring super low noise figure with good intercept in
the 450 MHz to 10 GHz frequency range.
Note:
1. From the same PHEMT FET family, the smaller geometry ATF-34143
may also be considered for the higher gain performance, particularly
in the higher frequency band (1.8 GHz and up).
MiniPak 1.4 mm x 1.2 mm Package
Px
Features
Low noise figure
Excellent uniformity in product specifications
1600 micron gate width
Miniature leadless package 1.4 mm x 1.2 mm x 0.7 mm
Tape-and-reel packaging option available
Specifications
2 GHz; 4 V, 60 mA (Typ.)
0.6 dB noise figure
15 dB associated gain
19 dBm output power at 1 dB gain compression
31 dBm output 3rd order intercept
Applications
Tower mounted amplifier, low noise amplifier and
driver amplifier for GSM/TDMA/CDMA base stations
LNA for WLAN, WLL/RLL, MMDS and wireless data
infrastructures
General purpose discrete PHEMT for other ultra low
noise applications
Pin Connections and Package Marking
Source
Drain
PxPin 3 Pin 4
Gate Source
Pin 2 Pin 1
Note:
Top View. Package marking provides orientation, product identification
and date code.
“P” = Device Type Code
“x” = Date code character. A different character is assigned for each
month and year.

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ATF-331M4 pdf
ATF-331M4 Typical Performance Curves, continued
1.6 30
1.4
25
1.2
20
1.0
0.8 15
0.6
10
0.4
5
0.2
0
0 2 4 6 8 10
FREQUENCY (GHz)
Figure 12. Fmin vs. Frequency at 4 V, 60 mA.
0
0 2 4 6 8 10
FREQUENCY (GHz)
Figure 13. Associated Gain vs. Frequency
at 4 V , 60 mA.
35
30
25
20
15
10
85°C
5 25°C
-40°C
0
01 2 3 4 5 6 78
FREQUENCY (GHz)
Figure 15. P1dB, OIP3 vs. Frequency and
Temp at Vd = 4 V , Ids = 60 mA.
35 3.5
30 3.0
P1dB
25
OIP3
Gain
2.5
NF
20 2.0
15 1.5
10 1.0
5 0.5
00
0 20 40 60 80 100
Idsq (mA)
Figure 16. OIP3, P1dB, NF and Gain vs.
Bias[1,2] at 3.9 GHz.
25
85°C
25°C
-40°C
20
2.0
1.5
15 1.0
10 0.5
50
02 4 68
FREQUENCY (GHz)
Figure 14. Fmin & Ga vs. Frequency and Temp.
Vd = 4V, Ids = 60 mA.
35 3.5
30 3.0
P1dB
25
OIP3
Gain
2.5
NF
20 2.0
15 1.5
10 1.0
5 0.5
0
0 20 40 60 80
Idsq (mA)
Figure 17. OIP3, P1dB, NF at 5.8 GHz.
0
100
Notes:
1. Measurements made on fixed tuned
production test board that was tuned
for optimal gain match with reasonable
noise figure at 4V 60  mA bias. This circuit
represents a trade-off between an optimal
noise match, maximum gain match and
a realizable match based on production
test board requirements. Circuit losses
have been de-embedded from actual
measurements.
2. Quiescent drain current, Idsq, is set
with zero RF drive applied. As P1dB is
approached, the drain current may increase
or decrease depending on frequency and
dc bias point. At lower values of Idsq the
device is running closer to class B as power
output approaches P1dB. This results in
higher P1dB and higher PAE (power added
efficiency) when compared to a device that
is driven by a constant current source as is
typically done with active biasing.
5

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ATF-331M4 arduino
S and Noise Parameter Measurements
The position of the reference planes used for the mea-
surement of both S and Noise Parameter measurements is
shown in Figure 23. The reference plane can be described
as being at the center of both the gate and drain pads.
S and noise parameters are measured with a 50 ohm
microstrip test fixture made with a 0.010” thickness
aluminum substrate. Both source pads are connected
directly to ground via a 0.010” thickness metal rib which
provides a very low inductance path to ground for both
source pads. The inductance associated with the addition
of printed circuit board plated through holes and source
bypass capacitors must be added to the computer circuit
simulation to properly model the effect of grounding the
source leads in a typical amplifier design.
Reference
Plane
Source
Pin 3
Gate
Pin 2
Px
Drain
Pin 4
Source
Pin 1
Microstrip
Transmission Lines
Figure 23. Position of the Reference Planes.
Noise Parameter Applications Information
The Fmin values are based on a set of 16 noise figure mea-
surements made at 16 different impedances using an ATN
NP5 test system. From these measurements, a true Fmin
is calculated. Fmin represents the true minimum noise
figure of the device when the device is presented with an
impedance matching network that transforms the source
impedance, typically 50, to an impedance represented
by the reflection coefficient o. The designer must design
a matching network that will present o to the device with
minimal associated circuit losses. The noise figure of the
completed amplifier is equal to the noise figure of the
device plus the losses of the matching network preceding
the device. The noise figure of the device is equal to Fmin
only when the device is presented with o. If the reflection
coefficient of the matching network is other than o, then
the noise figure of the device will be greater than Fmin
based on the following equation.
NF = Fmin + 4 Rn |s o | 2
Zo (|1 + o| 2)(1- |s|2)
Where Rn/Zo is the normalized noise resistance, o is the
optimum reflection coefficient required to produce Fmin
and s is the reflection coefficient of the source impedance
actually presented to the device.
The losses of the matching networks are non-zero and
they will also add to the noise figure of the device creating
a higher amplifier noise figure. The losses of the matching
networks are related to the Q of the components and asso-
ciated printed circuit board loss. o is typically fairly low at
higher frequencies and increases as frequency is lowered.
Larger gate width devices will typically have a lower o
as compared to narrower gate width devices. Typically for
FETs, the higher o usually infers that an impedance much
higher than 50is required for the device to produce Fmin.
At VHF frequencies and even lower L Band frequencies,
the required impedance can be in the vicinity of several
thousand ohms. Matching to such a high impedance
requires very hi-Q components in order to minimize circuit
losses. As an example at 900 MHz, when air wound coils
(Q>100)are used for matching networks, the loss can still
be up to 0.25 dB which will add directly to the noise figure
of the device. Using multilayer molded inductors with Qs
in the 30 to 50 range results in additional loss over the air
wound coil. Losses as high as 0.5 dB or greater add to the
typical 0.15 dB Fmin of the device creating an amplifier
noise figure of nearly 0.65 dB.
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