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PDF TEA18362LT Data sheet ( Hoja de datos )

Número de pieza TEA18362LT
Descripción GreenChip SMPS control IC
Fabricantes NXP Semiconductors 
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TEA18362LT
GreenChip SMPS control IC
Rev. 2 — 12 December 2013
Product data sheet
1. General description
The TEA18362LT is a controller IC for low-cost Switched Mode Power Supplies (SMPS).
It is intended for flyback topologies. The built-in green functions provide high efficiency at
all power levels.
At high power levels the flyback operates in Quasi-Resonant (QR) mode. At lower power
levels, the controller switches to Frequency Reduction (FR) or Discontinuous Conduction
Mode (DCM) and limits the peak current to approximately 25 % of the maximum peak
current. Valley switching is used in all operating modes.
At low power levels, when the flyback switching frequency drops below 25 kHz, the
flyback converter switches to burst mode. A special burst mode has been integrated
which reduces the opto current to a minimum level, ensuring high efficiency at low power
and excellent no load power performance. As the switching frequency in this mode has a
minimum value of 25 kHz while the burst frequency is below 800 Hz, the frequencies are
outside the audible range. During the non-switching phase of the burst mode, the internal
IC supply current is minimized for further efficiency optimization.
The TEA18362LT includes an accurate OverPower Protection (OPP). The OPP enables
the controller to operate in overpower situations for a limited amount of time. If the output
is shorted, the system switches to low-power mode where the output power is limited to a
lower level.
The TEA18362LT is manufactured in a high-voltage Silicon-On-Insulator (SOI) process.
The SOI process combines the advantages of a low-voltage process (accuracy,
high-speed protection, functions, and control), while maintaining the high-voltage
capabilities (high-voltage start-up, low standby power, and an integrated X-capacitor
discharge function).
The TEA18362LT enables low-cost, highly efficient and reliable supplies for power
requirements up to 75 W to be designed with a minimum number of external components.
All values mentioned in this data sheet are typical values, unless otherwise specified.

1 page




TEA18362LT pdf
NXP Semiconductors
TEA18362LT
GreenChip SMPS control IC
7. Functional description
7.1 General control
Figure 3 shows a typical configuration of the TEA18362LT, including flyback circuit
controller.
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Fig 3. Typical TEA18362LT configuration
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7.1.1 Start-up and UnderVoltage LockOut (UVLO)
Initially, the capacitor on the VCC pin is charged from the high-voltage mains using the
HV pin. As long as VCC is below Vstartup, the IC current consumption is minimized to
40 A.
When VCC reaches the Vstartup level, the control logic activates the internal circuitry. The
IC then waits for the PROTECT pin to reach Vdet(PROTECT) + Vdet(hys)PROTECT, the CTRL pin
to reach Vstartup(CTRL), and the mains voltage to increase to above the brownin level.
When all these conditions are met, the soft start capacitor on the ISENSE pin (CSS in
Figure 3) is charged. The system starts switching. In a typical application, the supply
voltage is taken over by the auxiliary winding of the transformer.
During the start-up period, the VCC pin is continuously regulated to the Vstartup level using
the HV charge current until the output voltage is at its regulation level, which is detected
via the CTRL pin. In this way the VCC capacitor value can be limited. Due to the limited
current capability from the HV pin and depending on the mains voltage, the voltage on pin
VCC can still drop slightly during the start-up period.
TEA18362LT
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 12 December 2013
© NXP B.V. 2013. All rights reserved.
5 of 29

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TEA18362LT arduino
NXP Semiconductors
TEA18362LT
GreenChip SMPS control IC
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Fig 9. Overpower protection curves

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During system start-up, the maximum overpower is limited to 100 % and the maximum
time-out period is lowered to 40 ms. Once the output voltage is within its regulation level
(voltage on the CTRL pin is below 5 V), the maximum overpower is switched to 150 %
and the maximum time-out period returns to 200 ms limiting the output power to a
minimum at a shorted output. Lowering the maximum output power and shortening the
overpower timer ensure that the input power of the system is limited to < 5 W at a shorted
output.
Due to the limited output power, the output voltage drops if the load requires more than
150 %. As a result, the VCC voltage drops as well and UVLO can be triggered. To retain
the same response in an overpower situation (whether UVLO is triggered or not) the
system enters the protection mode (latch or safe restart) when overpower + UVLO is
detected. The system entering the protection mode does not depend on the value of the
OP counter.
7.6.2 OverVoltage Protection (OVP)
An accurate output OVP is implemented by measuring the voltage at the AUX pin during
the secondary stroke. As the auxiliary winding voltage is a well-defined replica of the
output voltage, the OVP level can be adjusted by the external resistor divider ratio
RAUX2 / (RAUX1 + RAUX2).
An internal counter of 4 gate pulses prevents false OVP detection which can occur during
ESD or lightning events.
7.6.3 Protection input (PROTECT pin)
The PROTECT pin is a general purpose input pin. It can be used to switch off the
converter (latched protection). The converter is stopped when the voltage on this pin is
pulled below Vdet(PROTECT) (0.5 V).
The PROTECT pin can be used to create an OTP function by connecting a Negative
Temperature Coefficient (NTC) resistor to this pin. A voltage on the PROTECT pin lower
than 0.5 V detects overtemperature. The PROTECT current (maximum 74 A) flowing
through the external NTC resistor creates the voltage. The PROTECT voltage is clamped
TEA18362LT
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 12 December 2013
© NXP B.V. 2013. All rights reserved.
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