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PDF ICL7126 Data sheet ( Hoja de datos )
| Número de pieza | ICL7126 | |
| Descripción | Single Chip A/D Converter | |
| Fabricantes | Intersil | |
| Logotipo |  |
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Data Sheet
October 25, 2004
ICL7126
FN3084.5
3 1/2 Digit, Low Power, Single Chip A/D
Converter
The ICL7126 is a high performance, very low power
31/2-digit, A/D converter. All the necessary active devices
are contained on a single CMOS IC, including seven
segment decoders, display drivers, reference, and clock. The
ICL7126 is designed to interface with a liquid crystal display
(LCD) and includes a backplane drive. The supply current of
100µA is ideally suited for 9V battery operation.
The ICL7126 brings together an unprecedented combination
of high accuracy, versatility, and true economy. It features
auto-zero to less than 10µV, zero drift of less than 1µV/oC,
input bias current of 10pA maximum, and rollover error of
less than one count. The versatility of true differential input
and reference is useful in all systems, but gives the designer
an uncommon advantage when measuring load cells, strain
gauges and other bridge-type transducers. And finally the
true economy of single power operation allows a high
performance panel meter or multi-meter to be built with the
addition of only 10 passive components and a display.
The ICL7126 can be used as a plug-in replacement for the
ICL7106 in a wide variety of applications, changing only the
passive components.
Ordering Information
TEMP. RANGE
PART NUMBER
(°C)
PACKAGE
PKG.
DWG. #
ICL7126CPL
0 to 70
40 Ld PDIP
E40.6
ICL7126CPLZ
(Note 1)
0 to 70
40 Ld PDIP
E40.6
(Pb-free) (Note 2)
NOTES:
1. Intersil Pb-free products employ special Pb-free material sets;
molding compounds/die attach materials and 100% matte tin
plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations.
Intersil Pb-free products are MSL classified at Pb-free peak
reflow temperatures that meet or exceed the Pb-free
requirements of IPC/JEDEC J STD-020C.
2. Pb-free PDIPs can be used for through hole wave solder
processing only. They are not intended for use in Reflow solder
processing applications.
Features
• 8,000 Hours Typical 9V Battery Life
• Guaranteed Zero Reading for 0V Input on All Scales
• True Polarity at Zero for Precise Null Detection
• 1pA Typical Input Current
• True Differential Input and Reference
• Direct LCD Display Drive - No External Components
Required
• Pin Compatible With the ICL7106
• Low Noise - Less Than 15µVP-P
• On-Chip Clock and Reference
• Low Power Dissipation Guaranteed Less Than 1mW
• No Additional Active Circuits Required
• Pb-Free Available (RoHS Compliant)
Pinout
ICL7126 (PDIP)
TOP VIEW
V+ 1
D1 2
C1 3
B1 4
(1s) A1 5
F1 6
G1 7
E1 8
D2 9
C2 10
B2 11
(10s)
A2 12
F2 13
E2 14
D3 15
B3 16
(100s)
F3 17
E3 18
(1000) AB4 19
POL 20
(MINUS)
40 OSC 1
39 OSC 2
38 OSC 3
37 TEST
36 REF HI
35 REF LO
34 CREF+
33 CREF-
32 COMMON
31 IN HI
30 IN LO
29 A-Z
28 BUFF
27 INT
26 V-
25 G2 (10s)
24 C3
23 A3 (100s)
22 G3
21 BP/GND
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003, 2004. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
1 page  
ICL7126
Design Information Summary Sheet
• OSCILLATOR FREQUENCY
fOSC = 0.45/RC
COSC > 50pF; ROSC > 50kΩ
fOSC (Typ) = 48kHz
• OSCILLATOR PERIOD
tOSC = RC/0.45
• INTEGRATION CLOCK FREQUENCY
fCLOCK = fOSC/4
• INTEGRATION PERIOD
tINT = 1000 x (4/fOSC)
• 60/50Hz REJECTION CRITERION
tINT/t60Hz or tlNT/t50Hz = Integer
• OPTIMUM INTEGRATION CURRENT
IINT = 4µA
• FULL-SCALE ANALOG INPUT VOLTAGE
VlNFS (Typ) = 200mV or 2V
• INTEGRATE RESISTOR
RINT
=
V-----I--N----F---S--
IINT
• INTEGRATE CAPACITOR
CINT
=
(---t--I--N----T----)--(--I--I--N----T----)
VINT
• INTEGRATOR OUTPUT VOLTAGE SWING
VINT
=
(---t--I--N----T----)--(--I--I--N----T----)
CINT
• VINT MAXIMUM SWING:
(V- + 0.5V) < VINT < (V+ - 0.5V), VINT (Typ) = 2V
• DISPLAY COUNT
COUNT
=
1000 × ---V-----I-N-----
VREF
• CONVERSION CYCLE
tCYC = tCL0CK x 4000
tCYC = tOSC x 16,000
when fOSC = 48KHz; tCYC = 333ms
• COMMON MODE INPUT VOLTAGE
(V- + 1V) < VlN < (V+ - 0.5V)
• AUTO-ZERO CAPACITOR
0.01µF < CAZ < 1µF
• REFERENCE CAPACITOR
0.1µF < CREF < 1µF
• VCOM
Biased between V+ and V-
• VCOM ≅ V+ - 2.8V
Regulation lost when V+ to V- < ≅6.8V;
If VCOM is externally pulled down to (V + to V -)/2,
the VCOM circuit will turn off
• ICL7126 POWER SUPPLY: SINGLE 9V
V+ - V- = 9V
Digital supply is generated internally
VTEST ≅ V+ - 4.5V
• ICL7126 DISPLAY: LCD
Type: Direct drive with digital logic supply amplitude
Typical Integrator Amplifier Output Waveform (INT Pin)
AUTO ZERO PHASE
(COUNTS)
2999 - 1000
SIGNAL INTEGRATE
PHASE FIXED
1000 COUNTS
DE-INTEGRATE PHASE
0 - 1999 COUNTS
TOTAL CONVERSION TIME = 4000 x tCLOCK = 16,000 x tOSC
5
FN3084.5
5 Page 
ICL7126
Typical Applications
OSC 1 40
OSC 2 39
180kΩ
OSC 3 38
TEST 37
50pF
SET VREF
= 100mV
REF HI 36
V+ 35
CREF 34
CREF 33
COMMON 32
IN HI 31
IN LO 30
A-Z 29
BUFF 28
0.1µF
10kΩ 220kΩ
0.33µF
180kΩ
1MΩ
0.01µF
INT 27
V - 26 750kΩ
0.047µF
G2 25
C3 24
A3 23
TO DISPLAY
G3 22
BP/GND 21
TO BACKPLANE
+
IN
-
9V
Values shown are for 200mV full scale, 3 readings/sec., floating
supply voltage (9V battery).
FIGURE 10. ICL7126 USING THE INTERNAL REFERENCE
OSC 1 40
OSC 2 39
OSC 3 38
TEST 37
REF HI 36
V+ 35
CREF 34
CREF 33
COMMON 32
IN HI 31
IN LO 30
A-Z 29
BUFF 28
INT 27
V - 26
G2 25
C3 24
A3 23
G3 22
BP/GND 21
560kΩ
50pF
20kΩ
SET VREF
= 100mV
0.1µF
200kΩ 27kΩ
V+
0.33µF
180kΩ
1MΩ
0.01µF
+
IN
-
0.15µF
V-
TO DISPLAY
IN LO is tied to COMMON, thus establishing the correct common
mode voltage. COMMON acts as a pre-regulator for the reference.
Values shown are for 1 reading/sec.
FIGURE 11. ICL7126 WITH AN EXTERNAL BAND-GAP
REFERENCE (1.2V TYPE)
OSC 1 40
OSC 2 39
OSC 3 38
TEST 37
REF HI 36
V+ 35
CREF 34
CREF 33
COMMON 32
IN HI 31
IN LO 30
A-Z 29
BUFF 28
INT 27
V - 26
G2 25
C3 24
A3 23
G3 22
BP/GND 21
180kΩ
50pF
SET VREF
= 1.000V
0.1µF
250kΩ 240kΩ
0.22µF
1.8MΩ
1MΩ
0.01µF
750Ω 0.047µF
TO DISPLAY
TO BACK PLANE
V+
+
IN
-
V-
3 reading/s. For 1 reading/sec., delete 750Ω resistor, change CINT,
ROSC to values of Figure 11.
FIGURE 12. RECOMMENDED COMPONENT VALUES FOR 2.0V
FULL SCALE
OSC 1 40
OSC 2 39
OSC 3 38
TEST 37
REF HI 36
V+ 35
CREF 34
CREF 33
COMMON 32
IN HI 31
IN LO 30
A-Z 29
BUFF 28
INT 27
V - 26
G2 25
C3 24
A3 23
G3 22
BP/GND 21
100kΩ
100pF
SET VREF
= 100mV
0.1µF
1kΩ 10kΩ 15kΩ
+5V
1.2V (ICL8069)
1MΩ
+
0.47µF
47kΩ
0.01µF
IN
-
0.22µF
TO DISPLAY
Since low TC zeners have breakdown voltages ~6.8V, diode must be
placed across the total supply (10V). As in the case of Figure 12, IN
LO may be tied to COMMON.
FIGURE 13. ICL7126 WITH ZENER DIODE REFERENCE
11 FN3084.5
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet ICL7126.PDF ] | |
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