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PDF GS2994 Datasheet ( Hoja de datos )

Número de pieza GS2994
Descripción Adaptive Cable Equalizer
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GS2994 datasheet

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GS2994 pdf
Table 1-1: GS2994 Pin Descriptions (Continued)
Pin Number
8
Name
SQ_ADJ
Timing
Analog
Type
Input
9
OP_CTL
Not
Input
Synchronous
10, 11
12
13
SDO, SDO
VEE_O
VCC_O
Analog
Analog
Analog
Output
Power
Power
14 SLEEP Not Input
Synchronous
15 CD Not Output
Synchronous
16
VCC_A
Analog
Power
Center Pad
Power
Description
Squelch Threshold Adjust.
Adjusts the input signal amplitude threshold of the carrier detect
function. The output can be muted when the input signal
amplitude is too low by connecting the CD and OP_CTL pins
together through some external components. In this case, when CD
is LOW (0V), OP_CTL is forced LOW (0V), and when CD is HIGH
(2.5V), OP_CTL is forced HIGH (3.3V). The input level at which the
part is muted can be set through the SQ_ADJ pin through suitable
voltage variances as described in Section 4.4. NOTE: when the
SQ_ADJ functionality is used and/or in auto_mute, the auto sleep
feature is not allowed, and the SLEEP pin should be left open.
Includes an internal pull-down resistor.
CONTROL SIGNAL INPUT
Controls the Output Swing, De-emphasis, and Mute features of the
SDO and SDO outputs.
When connected to GND, the output swing is 800mV with no
de-emphasis. When connected to the 3.3V analog power supply, the
output is MUTED.
Includes an internal pull down resistor.
See Section 4.7 for all other control options.
Equalized serial digital differential output.
Most negative power supply for the output buffer.
Connect to GND.
Most positive power supply connection for the output buffer of the
device.
Connect to +1.2V ~ +3.3V DC.
CONTROL SIGNAL INPUT
When set HIGH, the GS2994 is powered-down except for the Carrier
Detect functionality.
Includes an internal pull-down resistor.
Carrier Detect status signal output.
Signal levels are LVCMOS/LVTTL compatible.
Indicates the presence of an input signal. When the CD pin is LOW, a
good input signal has been detected. When this pin is HIGH, the
input signal is invalid.
See Section 4.5.
Most positive power supply for the input buffer, core and control
circuits of the device.
Connect to +3.3V DC.
Internally bonded to VEE_A.
GS2994 GS2994 Adaptive Cable Equalizer
Data Sheet
53967 - 4
August 2012
5 of 20

5 Page

GS2994 arduino
SLEEP,
BYPASS,
GAIN_SEL
100kΩ
Figure 3-4: SLEEP, BYPASS and GAIN_SEL Circuits
VCC
CD
Figure 3-5: CD Circuit
OP_CTL
100kΩ
Internal Reference
Internal Reference
Figure 3-6: OP_CTL
GS2994 GS2994 Adaptive Cable Equalizer
Data Sheet
53967 - 4
August 2012
10 of 20

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