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PDF GS2970A Data sheet ( Hoja de datos )
| Número de pieza | GS2970A | |
| Descripción | HD SD SDI Receiver | |
| Fabricantes | Semtech | |
| Logotipo |  |
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GS2970A
3Gb/s, HD, SD SDI Receiver Complete with SMPTE Audio and Video Processing
Key Features
• Operation at 2.970Gb/s, 2.970/1.001Gb/s, 1.485Gb/s,
1.485/1.001Gb/s and 270Mb/s
• Supports SMPTE 425M (Level A and Level B), SMPTE
424M, SMPTE 292, SMPTE 259M-C and DVB-ASI
• Integrated Reclocker
• Integrated low phase noise VCO
• Serial digital reclocked, or non-reclocked loop-through
output
• Integrated audio de-embedder for 8 channels of 48kHz
audio
• Integrated audio clock generator
• Ancillary data extraction
• Optional conversion from SMPTE 425M Level B to
Level A for 1080p 50/59.94/60 4:2:2 10-bit inputs
• Parallel data bus selectable as either 20-bit or 10-bit
• Comprehensive error detection and correction
features
• Output H, V, F or CEA 861 timing signals
• 1.2V digital core power supply, 1.2V and 3.3V analog
power supplies, and selectable 1.8V or 3.3V I/O power
supply
• GSPI host interface
• -20ºC to +85ºC operating temperature range
• Low power operation (typically 350mW)
• Small 11mm x 11mm 100-ball BGA package
• Pb-free and RoHS compliant
Applications
Application: Single Link (3G-SDI) to Dual Link (HD-SDI) Converter
3G-SDI
EQ
GS2984/
GS2974
GS2970A
10-bit
HV F/PCLK
GS2962/72
HV F/PCLK
10-bit
GS2962/72
HD-SDI
Link A
HD-SDI
Link B
3G-SDI
Application: 1080p50/60 Monitor
EQ
GS2984/
GS2974
AES - OUT
GS2970A
AUDIO 1/2
AUDIO 3/4
AUDIO 5/6
AUDIO 7/8
Audio Clocks
Audio
Selector
20-bit
HV F/PCLK
Video
Processor
C TR L/TIMECODE
DAC
Speakers
DAC
Display
Application: Multi-format Downconverter
SD/HD/3G-SDI
EQ
GS2984/
GS2974
Analog
Sync
Sync
Seperator
10-bit SD Bypass
Memory
GS2970A
20-bit
HV F /P CLK
Video
Downconverter&
Aspect Ratio
Conversion
20-bit
HD/SD
Serializer
(GS1582,
GS1672)
SD-SDI
GS4901
AES 1/2
AES 3/4
AES 5/6
AES 7/8
Audio
Processing &
Delay
Audio Clocks
HV F / P CLK
AES 1/2
AES 3/4
AES 5/6
AES 7/8
Application: Multi-input Video Monitoring System
3G-SDI
Input 1
3G-SDI
Input 2
EQ
GS2984/
GS2974
EQ
GS2984/
GS2974
20-bit
GS2970A
HV F / P CLK
20-bit
GS2970A
HV F / P CLK
Video
Memory
Video
Formatter
HV /DE /P CLK
DVI/
VGA DAC
Video
Output
3G-SDI
Input n
EQ
GS2984/
GS2974
Analog
Sync
Sync
Seperator
20-bit
GS2970A
HV F / P CLK
AES BUS
GS4911
Audio
Select
HV F /P CLK
Audio Clocks
On Screen
Display
Generator
Audio
Processor
AE S OUT 1/2
AE S OUT 3/4
AE S OUT 5/6
AE S OUT 7/8
GS2970A 3Gb/s, HD, SD SDI Receiver
Data Sheet
54244 - 2
September 2012
www.semtech.com
1 of 150
1 page  
4.14 Data Format Detection & Indication ..................................................................................... 60
4.15 EDH Detection .............................................................................................................................. 61
4.15.1 EDH Packet Detection ................................................................................................... 61
4.15.2 EDH Flag Detection ........................................................................................................ 62
4.16 Video Signal Error Detection & Indication ......................................................................... 62
4.16.1 TRS Error Detection........................................................................................................ 64
4.16.2 Line Based CRC Error Detection ................................................................................ 64
4.16.3 EDH CRC Error Detection............................................................................................. 65
4.16.4 HD & 3G Line Number Error Detection ................................................................... 65
4.17 Ancillary Data Detection & Indication ................................................................................. 65
4.17.1 Programmable Ancillary Data Detection................................................................ 67
4.17.2 SMPTE 352M Payload Identifier ................................................................................ 68
4.17.3 Ancillary Data Checksum Error ................................................................................. 69
4.17.4 Video Standard Error..................................................................................................... 70
4.18 Signal Processing ......................................................................................................................... 70
4.18.1 TRS Correction & Insertion........................................................................................... 71
4.18.2 Line Based CRC Correction & Insertion ................................................................... 72
4.18.3 Line Number Error Correction & Insertion ............................................................. 72
4.18.4 ANC Data Checksum Error Correction & Insertion ............................................. 72
4.18.5 EDH CRC Correction & Insertion ............................................................................... 72
4.18.6 Illegal Word Re-mapping ............................................................................................. 73
4.18.7 TRS and Ancillary Data Preamble Remapping...................................................... 73
4.18.8 Ancillary Data Extraction............................................................................................. 73
4.18.9 Level B to Level A Conversion .................................................................................... 78
4.19 Audio De-embedder ................................................................................................................... 79
4.19.1 Serial Audio Data I/O Signals...................................................................................... 79
4.19.2 Serial Audio Data Format Support ............................................................................ 81
4.19.3 Audio Processing............................................................................................................. 85
4.19.4 Error Reporting ................................................................................................................ 92
4.20 GSPI - HOST Interface ................................................................................................................ 93
4.20.1 Command Word Description ...................................................................................... 93
4.20.2 Data Read or Write Access........................................................................................... 94
4.20.3 GSPI Timing....................................................................................................................... 95
4.21 Host Interface Register Maps .................................................................................................. 97
4.21.1 Video Core Registers...................................................................................................... 97
4.21.2 SD Audio Core Registers............................................................................................. 111
4.21.3 HD and 3G Audio Core Registers............................................................................. 126
4.22 JTAG Test Operation ................................................................................................................ 141
4.23 Device Power-up ....................................................................................................................... 143
4.24 Device Reset ................................................................................................................................ 143
4.25 Standby Mode ............................................................................................................................ 143
5. Application Reference Design ............................................................................................................. 144
5.1 Typical Application Circuit ......................................................................................................144
6. References & Relevant Standards ....................................................................................................... 145
7. Package & Ordering Information ........................................................................................................ 146
7.1 Package Dimensions ................................................................................................................... 146
7.2 Packaging Data ............................................................................................................................. 147
GS2970A 3Gb/s, HD, SD SDI Receiver
Data Sheet
54244 - 2
September 2012
5 of 150
5 Page 
Table 1-1:Pin Descriptions (Continued)
Pin
Number
Name
Timing
Type
Description
A9, A10, B8,
B9, B10,C8,
C9, C10, E9,
E10
DOUT18, 17, 19,
16, 15, 12, 14, 13,
10, 11
B1
B2, C3, C4
B3, F2, G1,
G2, G4
B4
B7, D9, G9,
J7
C1, D1
C2, D2, D3,
E3, F3
A_VDD
PLL_VDD
RSV
VCO_GND
IO_GND
SDI, SDI
A_GND
Output
Input Power
Input Power
PARALLEL DATA BUS
Please refer to the Output Logic parameters in the DC Electrical
Characteristics table for logic level threshold and compatibility.
20-bit mode
20bit/10bit = HIGH
SMPTE mode (SMPTE_BYPASS = HIGH
and DVB_ASI = LOW):
Luma data output for SD and HD data
rates; Data Stream 1 for 3G data rate
DVB-ASI mode (SMPTE_BYPASS = LOW
and DVB_ASI = HIGH):
Not defined
Data-Through mode (SMPTE_BYPASS =
LOW and DVB_ASI = LOW):
Data output
10-bit mode
20bit/10bit = LOW
SMPTE mode (SMPTE_BYPASS = HIGH
and DVB_ASI = LOW):
Multiplexed Luma/Chroma data output
for SD and HD data rates; Multiplexed
Data Stream 1&2 for 3G data rate
DVB-ASI mode (SMPTE_BYPASS = LOW
and DVB_ASI = HIGH):
8b/10b decoded DVB-ASI data
Data-Through mode (SMPTE_BYPASS =
LOW and DVB_ASI = LOW):
Data output
POWER pin for analog circuitry. Connect to 3.3V DC analog.
POWER pins for the Reclocker PLL. Connect to 1.2V DC analog.
These pins must be left unconnected.
Input Power
Input Power
GND pin for the VCO. Connect to analog GND.
GND connection for digital I/O. Connect to digital GND.
Analog Input Serial Digital Differential Input.
Input Power GND pins for sensitive analog circuitry. Connect to analog GND.
GS2970A 3Gb/s, HD, SD SDI Receiver
Data Sheet
54244 - 2
September 2012
11 of 150
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet GS2970A.PDF ] | |
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