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PDF DAC161P997 Data sheet ( Hoja de datos )

Número de pieza DAC161P997
Descripción Single-Wire 16-bit DAC
Fabricantes National Semiconductor 
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DAC161P997
August 2, 2011
Single-Wire 16-bit DAC for 4-20mA Loops
1.0 General Description
The DAC161P997 is a 16- bit Δ digital-to-analog converter
(DAC) for transmitting an analog output current over an in-
dustry standard 4-20 mA current loop. It offers 16-bit accuracy
with a low output current temperature coefficient (29ppm/°C)
and excellent long-term output current drift (90 ppmFS) while
consuming less than 190µA.
The data link to the DAC161P997 is a Single Wire Interface
(SWIF) which allows sensor data to be transferred in digital
format over an isolation boundary using a single isolation
component. The DAC161P997’s digital input is compatible
with standard isolation transformers and optocouplers. Error
detection and handshaking features within the SWIF protocol
ensure error free communication across the isolation bound-
ary. For applications where isolation is not required, the
DAC161P997 interfaces directly to a microcontroller.
The loop drive of the DAC161P997 interfaces to a HART
(Highway Addressable Remote Transducer) modulator, al-
lowing injection of FSK modulated digital data into the 4-20mA
current loop. This combination of specifications and features
makes the DAC161P997 ideal for 2- and 4-wire industrial
transmitters.
The DAC161P997 is available in a 16–lead LLP package and
is specified over the extended industrial temperature range of
-40°C to 105°C.
2.0 Applications
• Two-wire, 4-20 mA current loop transmitter
• Industrial Process Control
• Actuator control
• Factory Automation
• Building Automation
• Precision Instruments
• Data Acquisition Systems
• Test Systems
3.0 Features
16-bit linearity
Single-Wire Interface (SWIF), with handshake
Digital Data transmission (no loss of fidelity)
Pin Programmable Power-Up Condition
Self adjusting to input data rate
Loop error detection and reporting
Programmable output current error level
No external precision components
Simple interface to HART modulator
Small package: LLP-16 (4x4 mm, 0.5 mm pitch)
4.0 Key Specifications
Output Current TempCohttp://www.DataSheet4U.net/
Long-Term Output Current Drift
INL
Total Supply Current
29 ppmFS/°C(max)
90 ppmFS(typ)
+3.3/−2.1 µA(max)
190 µA(max)
5.0 Typical Application - Conceptual Schematic
National Semiconductor® is a registered trademark of National Semiconductor Corporation.
© 2011 National Semiconductor Corporation 301544
30154401
www.national.com
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DAC161P997 pdf
Table of Contents
1.0 General Description ......................................................................................................................... 1
2.0 Applications .................................................................................................................................... 1
3.0 Features ........................................................................................................................................ 1
4.0 Key Specifications ........................................................................................................................... 1
5.0 Typical Application - Conceptual Schematic ........................................................................................ 1
6.0 Block Diagram ................................................................................................................................ 2
7.0 Functional Overview ........................................................................................................................ 3
7.1 4-20 mA CURRENT LOOP TRANSMITTER ................................................................................ 3
7.2 SINGLE-WIRE INTERFACE (SWIF) ........................................................................................... 3
8.0 Connection Diagram ........................................................................................................................ 3
9.0 Pin Descriptions .............................................................................................................................. 4
10.0 Ordering Information ...................................................................................................................... 4
11.0 Absolute Maximum Ratings ............................................................................................................. 6
12.0 Operating Conditions (Note 1, Note 2) ............................................................................................... 6
13.0 Electrical Characteristics ................................................................................................................ 6
14.0 Single-Wire Interface (SWIF) Timing Diagram .................................................................................... 8
15.0 Typical Performance Characteristics ................................................................................................ 9
16.0 Register Set ................................................................................................................................ 11
16.1 LCK: Address=0x00; Default=0x00 ......................................................................................... 11
16.2 CONFIG1: Address=0x01; Default=0x08 ................................................................................. 11
16.3 CONFIG2: Address=0x02; Default=0x1F ................................................................................ 11
16.4 CONFIG3: Address=0x03; Default=0x08 ................................................................................. 11
16.5 ERR_LOW: Address=0x04; Default=0x24 ............................................................................... 12
16.6 ERR_HIGH: Address=0x05; Default=0xE8 ............................................................................... 12
17.0 Application Information ................................................................................................................. 13
17.1 16-BIT DAC AND LOOP DRIVE ............................................................................................. 13
17.1.1 DC Characteristics ...................................................................................................... 13
17.1.1.1 DC Input-Output Transfer Function ...................................................................... 14
17.1.1.2 Loop Interface .................................................................................................. 14
17.1.1.3 Loop Compliance .............................................................................................. 14
17.1.2 AC Characteristics ...................................................................................................... 15
17.1.2.1 Step Response ................................................................................................. 16
17.1.2.2 Output impedance ............................................................................................ 16
17.1.2.3 PSRR ................................................http://www.DataSheet4U.net/............................................................. 16
17.1.2.4 Stability ........................................................................................................... 16
17.1.2.5 Noise and Ripple .............................................................................................. 17
17.1.2.6 Digital Feedthrough ........................................................................................... 17
17.1.2.7 HART Signal Injection ....................................................................................... 17
17.1.2.8 RC Filter Limitation ........................................................................................... 17
17.1.3 Alarm Current ............................................................................................................ 17
17.2 SINGLE-WIRE INTERFACE (SWIF) ....................................................................................... 17
17.2.1 Frame Format ............................................................................................................ 18
17.2.2 Inter-Frame Period ...................................................................................................... 18
17.2.3 Symbol Set ................................................................................................................ 18
17.2.4 Interface Circuit .......................................................................................................... 20
17.2.4.1 Transformer Coupled Interface - Data Flow to the DAC .......................................... 20
17.2.4.2 Transformer Coupled Interface - Acknowledge Pulse ............................................. 21
17.2.4.3 DC-Coupled Interface ........................................................................................ 21
17.2.4.4 SWIF Implementation Examples ......................................................................... 22
17.2.4.5 Transformer Selection and SWIF Data Link Circuit Design ..................................... 25
17.3 ERROR DETECTION AND REPORTING ................................................................................ 28
18.0 Application Circuit Examples ......................................................................................................... 29
19.0 Physical Dimensions .................................................................................................................... 30
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DAC161P997 arduino
16.0 Register Set
16.1 LCK: Address=0x00; Default=0x00
Bit Field
7:0
Name
Description
0x95 - registers unlocked
0x** - any value written locks registers
A register lock prevents inadvertent changes to the configuration. The DAC output
cannot be updated while software configuration registers are unlocked.
16.2 CONFIG1: Address=0x01; Default=0x08
Bit Field
7:5
4:3
2:1
0
Name
SERR
RST
Description
RESERVED. Always write 0.
0b00 - NOP
0b01 - set error
0b10 - clear error
0b11 - NOP
Sets or clears the error condition. At power-on the error is set. Error is also cleared
after reception of valid SWIF frame. These bits are self clearing.
This functionality can be used for diagnostic purposes, e.g. Master can use SERR to
force ILOOP into an error band, and then return it to previously held output level.
RESERVED. Always write 0.
0 - NOP
1- same as power-on reset. Once device is reset to default state the bit clears
automatically
16.3 CONFIG2: Address=0x02; Default=0x1F
Bit Field
7:5
4
3
2
1
0
Name
ACK_EN
FRAME
PARITY
CHANNEL
LOOP
Description
RESERVED. Always write 0.
http://www.DataSheet4U.net/
Set to enable ACK
When enabled, an acknowledgement is indicated on the serial interface upon detection
of each valid frame. See Section 17.2.1 Frame Format
Set to enable framing error reporting. See table in Section 17.3 ERROR DETECTION
AND REPORTING
Set to enable parity error reporting. See table in Section 17.3 ERROR DETECTION
AND REPORTING
Set to enable channel-inactive reporting. See table in Section 17.3 ERROR
DETECTION AND REPORTING
Set to enable loop error reporting. See table in Section 17.3 ERROR DETECTION AND
REPORTING
16.4 CONFIG3: Address=0x03; Default=0x08
Bit Field
7:4
3:0
Name
RX_ERR_CNT
Description
RESERVED. Always write 0.
0 <= RX_ERR_CNT 15 Threshold = 1 + RX_ERR_CNT
The slave enters the error state once ‘Threshold’ number of consecutive FRAME or
PARITY errors are counted. The threshold is programmable to prevent occasional
errors from being reported. See table in Section 17.3 ERROR DETECTION AND
REPORTING
11
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