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PDF LM324S Data sheet ( Hoja de datos )

Número de pieza LM324S
Descripción Single Supply Quad Operational Amplifiers
Fabricantes ON Semiconductor 
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LM324S, LM2902S
Single Supply Quad
Operational Amplifiers
The LM324S and LM2902S are low−cost, quad operational
amplifiers with true differential inputs. They have several distinct
advantages over standard operational amplifier types in single supply
applications. The common mode input range includes the negative
supply, thereby eliminating the necessity for external biasing
components in many applications. The output voltage range also
includes the negative power supply voltage.
Features
Short Circuited Protected Outputs
True Differential Input Stage
Single Supply Operation: 3.0 V to 32 V
Four Amplifiers Per Package
Internally Compensated
Common Mode Range Extends to Negative Supply
Industry Standard Pinouts
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
http://onsemi.com
MARKING DIAGRAMS
14
LM324SN
AWLYYWWG
1
PDIP−14
1
14
N SUFFIX
CASE 646
LM2902SN
AWLYYWWG
1
LMxxxx = Specific Device Code
A = Assembly Location
WL = Wafer Lot
Y, YY = Year
WW = Work Week
G = Pb−Free Package
PIN CONNECTIONS
Out 1 1
2
Inputs 1 3 *)1
VCC 4
Inputs 2 5 )*2
6
Out 2 7
14 Out 4
13
4*) 12
Inputs 4
11 VEE, GND
3)* 10
9
Inputs 3
8 Out 3
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information on page 7 of
this data sheet.
© Semiconductor Components Industries, LLC, 2014
October, 2014 − Rev. 0
1
Publication Order Number:
LM324S/D

1 page




LM324S pdf
LM324S, LM2902S
CIRCUIT DESCRIPTION
The LM324S and LM2902S are made using four
internally compensated, two−stage operational amplifiers.
The first stage of each consists of differential input devices
Q20 and Q18 with input buffer transistors Q21 and Q17 and
the differential to single ended converter Q3 and Q4. The
first stage performs not only the first stage gain function but
also performs the level shifting and transconductance
reduction functions. By reducing the transconductance, a
smaller compensation capacitor (only 5.0 pF) can be
employed, thus saving chip area. The transconductance
reduction is accomplished by splitting the collectors of Q20
and Q18. Another feature of this input stage is that the input
common mode range can include the negative supply or
ground, in single supply operation, without saturating either
the input devices or the differential to single−ended
converter. The second stage consists of a standard current
source load amplifier stage.
Each amplifier is biased from an internal−voltage
regulator which has a low temperature coefficient thus
giving each amplifier good temperature characteristics as
well as excellent power supply rejection.
3.0 V to VCC(max)
Single Supply
VCC
1
2
3
4
VEE/GND
Figure 2.
VCC
1
2
3
4
VEE
1.5 V to VCC(max)
1.5 V to VEE(max)
Split Supplies
http://onsemi.com
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