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PDF SC32442B Data sheet ( Hoja de datos )

Número de pieza SC32442B
Descripción RISC Microcontroller User Manual
Fabricantes Samsung 
Logotipo Samsung Logotipo



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SC32442B
USER’S MANUAL
Revision 1.2

1 page




SC32442B pdf
SC32442B RISC MICROPROCESSOR
PRODUCT OVERVIEW
1 PRODUCT OVERVIEW
INTRODUCTION
This user’s manual describes SAMSUNG's SC32442B 16/32-bit RISC microprocessor. SAMSUNG’s SC32442B
is designed to provide hand-held devices and general applications with low-power, and high-performance micro-
controller solution in small die size. To reduce total system cost, the SC32442B includes the following
components.
The SC32442B is developed with ARM920T core, 0.13um CMOS standard cells and a memory complier. Its low-
power, simple, elegant and fully static design is particularly suitable for cost- and power-sensitive applications. It
adopts a new bus architecture known as Advanced Micro controller Bus Architecture (AMBA).
The SC32442B offers outstanding features with its CPU core, a 16/32-bit ARM920T RISC processor designed by
Advanced RISC Machines, Ltd. The ARM920T implements MMU, AMBA BUS, and Harvard cache architecture
with separate 16KB instruction and 16KB data caches, each with an 8-word line length.
By providing a complete set of common system peripherals, the SC32442B minimizes overall system costs and
eliminates the need to configure additional components. The integrated on-chip functions that are described in
this document include:
Around [email protected] arm and 1.5V internal, [email protected] arm and 1.35V internal, 1.8Vmemory, 3.3V
external I/O microprocessor with 16KB I-Cache/16KB D-Cache/MMU
External memory controller (SDRAM Control and Chip Select logic)
LCD controller (up to 4K color STN and 256K color TFT) with LCD-dedicated DMA
4-ch DMA controllers with external request pins
3-ch UARTs (IrDA1.0, 64-Byte Tx FIFO, and 64-Byte Rx FIFO)
2-ch SPls
IIC bus interface (multi-master support)
IIS Audio CODEC interface
SD Host interface version 1.0 & MMC Protocol version 2.11 compatible
2-ch USB Host controller / 1-ch USB Device controller (ver 1.1)
4-ch PWM timers / 1-ch Internal timer / Watch Dog Timer
8-ch 10-bit ADC and Touch screen interface
RTC with calendar function
Camera interface (Max. 4096 x 4096 pixels input support. 2048 x 2048 pixel input support for scaling)
130 General Purpose I/O ports / 24-ch external interrupt source
Power control: Normal, Slow, Idle, stop and Sleep mode
On-chip clock generator with PLL
1-1

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SC32442B arduino
SC32442B RISC MICROPROCESSOR
PRODUCT OVERVIEW
Table 1-1. 332-Pin FBGA Pin Assignments – Pin Number Order (Sheet 1 of 4)
Pin
Number
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
Pin Name
ADDR10
ADDR13
NGCS5/GPA16
NBE1
NSRAS
NSCAS
ADDR2
ADDR7
ADDR9
VSSMOP
ADDR11
ADDR14
ADDR24/GPA9
DATA2
DATA4
DATA0
DATA5
DATA6
VDDMOP
DATA7
DATA9
DATA10
DATA16
DATA12
ADDR6
ADDR8
SCKE
NGCS6
NGCS2/GPA13
NBE3
VDDI
VSSCOM
ADDR4
NOE
Pin
Number
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
C1
C2
C25
C26
D1
D2
D25
D26
E1
E2
E5
E6
E7
E8
E9
E10
E11
E12
Pin Name
ADDR1
ADDR12
ADDR15
ADDR23/GPA8
ADDR18/GPA3
ADDR21/GPA6
ADDR26/GPA11
DATA3
DATA1
DATA8
VDDI
VSSOP1
DATA11
VDDMOP
DATA14
DATA13
ADDR5
NWAIT
DATA19
DATA15
ADDR3
NGCS4/GPA15
VSSMOP
DATA17
NBE2
VSSMOP
VSSMOP
NGCS3/GPA14
NGCS1/GPA12
VDDMOP
VDDI
SCLK1
ADDR0/GPA0
VDDMOP
Pin
Number
E13
E14
E15
E16
E17
E18
E19
E20
E21
E22
E25
E26
F1
F2
F5
F6
F7
F8
F9
F10
F11
F12
F13
F14
F15
F16
F17
F18
F19
F20
F21
F22
F25
F26
Pin Name
VDDI
VSSCOM
ADDR16/GPA1
VDDI
VDDMOP
ADDR25/GPA10
VSSMOP
TCK
TMS
XTOPLL
DATA21
DATA18
NBE0
NGCS7
VDDI
NGCS0
VDDIARM
VDDIARM
CAMVSYNC/GPJ9
VSSMOP
CAMCLKOUT/GPJ11
ADDR20/GPA5
ADDR19/GPA4
ADDR17/GPA2
ADDR22/GPA7
CAMDATA0/GPJ0
TXD1/GPH4
CAMRESET/GPJ12
TOUT1/GPB1
PWREN
VDDALIVE
TDI
VDDI
DATA20
1-7

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