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PDF KS480 Data sheet ( Hoja de datos )

Número de pieza KS480
Descripción LCD controller/driver
Fabricantes GPEG 
Logotipo GPEG Logotipo



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No Preview Available ! KS480 Hoja de datos, Descripción, Manual

KS480 LCD
controller/driver
480 segment, KickStart™
protocol, intelligent LCD front
panel controller and driver, with
SPI and i2c interface
GPEG International Ltd
GPEG International Ltd

1 page




KS480 pdf
Block Diagram of COF version
KS480: KICKSTART LCD CONTROLLER DRIVER
480 segment intelligent LCD display controller
Notes:
1|Page
GPEG International Ltd, London, SE18 6SW
Revision: 0.1
www.gpegint.com

5 Page





KS480 arduino
KS480: KICKSTART LCD CONTROLLER DRIVER
480 segment intelligent LCD display controller
Command Set Summary
Kickstart Host interface protocol, V0.4, PRELIMINARY
Kickstart supports i2c (2 wires) and SPI (4 wires) bus modes for Host interface.
Interface select: by "BusMode" pin in host connector. 1=i2c, 0=SPI.
Max clock speed: 50 kHz, see timing diagrams for details.
Kickstart suspends all other internal processes while receiving the command.
For preventing Kickstart from hanging if the host stops the interface clock, 1 sec Watchdog timeout
used.
The WDT restarts if an byte received. If the byte not completed within 1 sec, causes WDT reset to
clear PowerOn state.
In this case all data cleared, the Host should initialize Kickstart again.
At the command start, the Host should check Kickstart ready/busy state, see below.
Kickstart can be busy either:
- After command received until executes it,
- during 2 Hz timer event handling (RTC, animations...).
7|Page
GPEG International Ltd, London, SE18 6SW
Revision: 0.1
www.gpegint.com

11 Page







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