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PDF LC87F7DJ2C Data sheet ( Hoja de datos )
| Número de pieza | LC87F7DJ2C | |
| Descripción | 8-bit 1-chip Microcontroller | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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Ordering number : ENA1872A
LC87F7DJ2C
CMOS IC
FROM 192K byte, RAM 8K byte on-chip
8-bit 1-chip Microcontroller
http://onsemi.com
Overview
The LC87F7DJ2C is an 8-bit microcomputer that, centered around a CPU running at a minimum bus cycle time of
50ns, integrates on a single chip a number of hardware features such as 192K-byte flash ROM (onboard
programmable), 8K-byte RAM, an on-chip debugger, a LCD controller/driver, sophisticated 16-bit timer/counter
(may be divided into 8-bit timers), a 16-bit timer/counter (may be divided into 8-bit timers/counters or 8-bit PWMs),
four 8-bit timers with a prescaler, a 16-bit timer with a prescaler (may be divided into 8-bit timers), a base timer
serving as a time-of-day clock, a day and time counter, a synchronous SIO interface (with automatic block
transmission/reception capabilities), an asynchronous/synchronous SIO interface, two UART ports (full duplex), an
12-bit 15-channel AD converter, two 12-bit PWM channels, a high-speed clock counter, a system clock frequency
divider, a small signal detector, two remote control receive functions, and a 31-source 10-vector interrupt feature.
Features
Flash ROM
• Capable of on-board-programming with wide range, 3.0 to 3.6V, of voltage source.
• Block-erasable in 2-byte units
• 196608 × 8 bits
RAM
• 8192 × 9 bits
Minimum Bus Cycle Time
• 50.0ns (20MHz)
VDD=2.7 to 3.6V
Note: The bus cycle time here refers to the ROM read speed.
* This product is licensed from Silicon Storage Technology, Inc. (USA).
Semiconductor Components Industries, LLC, 2013
May, 2013
Ver.1.04
N2812HKIM 201111213-S00001 No.A1872-1/26
1 page  
LC87F7DJ2C
Continued from preceding page.
• HOLD mode: Suspends instruction execution and the operation of the peripheral circuits.
1) The CF, RC, X’tal, and frequency variable RC oscillators automatically stop operation.
2) There are three ways of resetting the HOLD mode.
(1) Setting the reset pin to the low level
(2) Setting at least one of the INT0, INT1, INT2, INT4, and INT5 pins to the specified level
(3) Having an interrupt source established at port 0
• X'tal HOLD mode: Suspends instruction execution and the operation of the peripheral circuits except the base timer
and the remote control receiver circuit.
1) The CF, RC, and frequency variable RC oscillators automatically stop operation.
2) The state of crystal oscillation established when the X'tal HOLD mode is entered is retained.
3) There are five ways of resetting the X'tal HOLD mode.
(1) Setting the reset pin to the low level
(2) Setting at least one of the INT0, INT1, INT2, INT4, and INT5 pins to the specified level
(3) Having an interrupt source established at port 0
(4) Having an interrupt source established in the base timer circuit
(5) Having an interrupt source established in the remote control receiver circuit
On-chip Debugger
• Supports software debugging with the IC mounted on the target board.
Package Form
• QIP100E(14×20): Lead-free type/Halogen-free type
• TQFP100(14×14): Lead-free type/Halogen-free type (Under development)
Development Tools
• On-chip debugger: TCB87 TypeB +LC87F7DJ2C or TCB87 TypeC(3Lines Cable)+LC87F7DJ2C
Flash ROM Programming Boards
Package
Programming boards
QIP100E(14×20)
W87FQ100
TQFP100(14×14)
W87FSQ100
Flash ROM Programmer
Maker
Model
Supported version
Device
AF9708
Single
AF9709/AF9709B/AF9709C
(Including product of Ando
(Note 2)
LC87F7DJ2C
Electric Co., Ltd)
Flash Support Group, Inc.
AF9723/AF9723B(Main body)
(FSG)
(Including product of Ando
(Note 2)
Gang
Electric Co., Ltd)
AF9833(Unit)
LC87F7DJ2C
(Including product of Ando
(Note 2)
Electric Co., Ltd)
Flash Support Group, Inc.
AF9101/AF9103(Main body)
(FSG)
+
Onboard
Single/Gang
(FSG)
SIB87(interface driver)
(Note 2)
LC87F7DJ2C
Our company (Note 1)
(Our company model)
Our company
Single/Gang
Onboard
SKK/SKK Type B
(SANYO FWS)
SKK-DBG Type B
Application Version
After 1.05
Chip Data Version
LC87F7DJ2C
Single/Gang
(SANYO FWS)
After 2.23
Note 1: With the FSG onboard programmer (AF9101/AF9103) and the serial interface driver provided by Our
company, PC-less standalone onboard programming is possible
Note 2: Depending on programming conditions, it is necessary to use a dedicated programming device and a program.
Please contact Our company or FSG if you have any questions or difficulties regarding this matter.
No.A1872-5/26
5 Page 
LC87F7DJ2C
Continued from preceding page.
Pin Name
I/O
Description
Port 7
P70 to P73
I/O • 4-bit I/O port
• I/O specifiable in 1-bit units
• Pull-up resistors can be turned on and off in 1-bit units.
• Shared pins
P70: INT0 input/HOLD release input/timer 0L capture input/watchdog timer output
P71: INT1 input/HOLD release input/timer 0H capture input
P72: INT2 input/HOLD release input/timer 0 event input/timer 0L capture input/
high speed clock counter input
P73: INT3 input (with noise filter)/timer 0 event input/timer 0H capture input/
remote control receiver input
AD converter input ports: AN8 (P70), AN9 (P71)
Interrupt acknowledge type
Rising
Falling
Rising &
Falling
H level
L level
INT0
enable
enable
disable
enable
enable
INT1
enable
enable
disable
enable
enable
INT2
enable
enable
enable
disable
disable
INT3
enable
enable
enable
disable
disable
Port 8
P80 to P87
S0/PA0 to
S7/PA7
S8/PB0 to
S15/PB7
S16/PC0 to
S23/PC7
S24/PD0 to
S31/PD7
S32/PE0 to
S39/PE7
S40/PF0 to
S47/PF7
COM0/PL0 to
COM3/PL3
V1/PL4 to
V3/PL6
RES
XT1
XT2
CF1
CF2
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Input
Input
I/O
Input
Output
• 8-bit I/O port
• I/O specifiable in 1-bit units
• Shared pins
AD converter input ports: AN0 to AN7
Small signal detector input port: MICIN (P87)
• Segment output for LCD
• Can be used as general-purpose I/O port (PA)
• Segment output for LCD
• Can be used as general-purpose I/O port (PB)
• Segment output for LCD
• Can be used as general-purpose I/O port (PC)
• Segment output for LCD
• Can be used as general-purpose I/O port (PD)
• Segment output for LCD
• Can be used as general-purpose I/O port (PE)
• Segment output for LCD
• Can be used as general-purpose I/O port (PF)
PF6: INT6 input
PF7: INT7 input
• Common output for LCD
• Can be used as general-purpose input port (PL)
• LCD output bias power supply
• Can be used as general-purpose input port (PL)
• Shared pins
AD converter input ports: AN12 (V1) to AN14 (V3)
On-chip debugger pins: DBGP0 (V1) to DBGP2 (V3)
Reset pin
• 32.768kHz crystal oscillator input pin
• Shared pins
General-purpose input port
AD converter input port: AN10
Must be connected to VDD1 if not to be used.
• 32.768kHz crystal oscillator output pin
• Shared pins
General-purpose I/O port
AD converter input port: AN11
Must be set for oscillation and kept open if not to be used.
Ceramic resonator input pin
Ceramic resonator output pin
Option
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No.A1872-11/26
11 Page | ||
| Páginas | Total 26 Páginas | |
| PDF Descargar | [ Datasheet LC87F7DJ2C.PDF ] | |
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