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PDF FDS7082N3 Data sheet ( Hoja de datos )

Número de pieza FDS7082N3
Descripción 30V N-Channel PowerTrench MOSFET
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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February 2004
FDS7082N3
30V N-Channel PowerTrenchMOSFET
General Description
This N-Channel MOSFET in the thermally enhanced
SO8 FLMP package has been designed specifically to
improve the overall efficiency of DC/DC converters.
Providing a balance of low RDS(ON) and Qg it is ideal for
synchronous rectifier applications in both isolated and
non-isolated topologies. It is also well suited for both
high and low side switch applications in Point of Load
converters.
Applications
Secondary side Synchronous rectifier
Synchronous Buck VRM and POL Converters
Features
17.5 A, 30 V RDS(ON) = 6 m@ VGS = 10 V
RDS(ON) = 8 m@ VGS = 4.5 V
High performance trench technology for extremely
low RDS(ON)
Low Qg and Rg for fast switching
FLMP SO-8 package for enhanced thermal
performance in an industry-standard package outline.
Bottom-side
5 Drain Contact
6
7
8
4
3
2
1
Absolute Maximum Ratings TA=25oC unless otherwise noted
Symbol
Parameter
VDSS
VGSS
ID
Drain-Source Voltage
Gate-Source Voltage
Drain Current – Continuous
– Pulsed
(Note 1a)
PD
Power Dissipation for Single Operation
(Note 1a)
(Note 1b)
TJ, TSTG
Operating and Storage Junction Temperature Range
Thermal Characteristics
RθJA Thermal Resistance, Junction-to-Ambient
RθJC Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
Package Marking and Ordering Information
Device Marking
Device
Reel Size
FDS7082N3
FDS7082N3
13’’
2004 Fairchild Semiconductor Corporation
Ratings
30
±20
17.5
60
3.0
1.5
–55 to +150
40
0.5
Tape width
12mm
Units
V
V
A
W
°C
°C/W
°C/W
Quantity
2500 units
FDS7082N3 Rev D1 (W)

1 page




FDS7082N3 pdf
Typical Characteristics
10
ID = 17.5A
8
6
4
VDS = 5V
15V
10V
2
0
0 10 20 30 40
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics.
50
1000
RDS(ON) LIMIT
100
10
1 VGS = 10V
SINGLE PULSE
0.1
RθJA = 85oC/W
TA = 25oC
100µs
1ms
10ms
100ms
1s
10s
DC
0.01
0.01
0.1 1 10
VDS, DRAIN-SOURCE VOLTAGE (V)
100
Figure 9. Maximum Safe Operating Area.
3000
2500
2000
f = 1MHz
VGS = 0 V
Ciss
1500
1000
500
Crss
0
0
Coss
5 10 15
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 8. Capacitance Characteristics.
20
50
SINGLE PULSE
RθJA = 85°C/W
40 TA = 25°C
30
20
10
0
0.01
0.1
1 10
t1, TIME (sec)
100
Figure 10. Single Pulse Maximum
Power Dissipation.
1000
1.00
0.10
0.01
D = 0.5
0.2
0.1
0.05
0.02
0.01
0.00
0.0001
SINGLE PULSE
0.001
0.01
0.1
t1, TIME (sec)
1
RθJA(t) = r(t) * RθJA
RθJA = 85 °C/W
P(pk)
t1
t2
TJ - TA = P * RθJA(t)
Duty Cycle, D = t1 / t2
10 100 1000
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b.
Transient thermal response will change depending on the circuit board design.
FDS7082N3 Rev D1 (W)

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