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PDF IRF7379QPbF Data sheet ( Hoja de datos )

Número de pieza IRF7379QPbF
Descripción Power MOSFET ( Transistor )
Fabricantes International Rectifier 
Logotipo International Rectifier Logotipo



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No Preview Available ! IRF7379QPbF Hoja de datos, Descripción, Manual

l Advanced Process Technology
l Ultra Low On-Resistance
l Dual N and P Channel MOSFET
l Surface Mount
l Available in Tape & Reel
l 150°C Operating Temperature
l Lead-Free
Description
These HEXFET® Power MOSFET's in a Dual SO-
8 package utilize the lastest processing techniques
to achieve extremely low on-resistance per silicon
area. Additional features of these HEXFET Power
MOSFET's are a 150°C junction operating
temperature, fast switching speed and improved
repetitive avalanche rating. These benefits combine
to make this design an extremely efficient and
reliable device for use in a wide variety of
applications.
The efficient SO-8 package provides enhanced
thermal characteristics and dual MOSFET die
capability making it ideal in a variety of power
applications. This dual, surface mount SO-8 can
dramatically reduce board space and is also
available in Tape & Reel.
S2 1
G2 2
S1 3
G1 4
PD - 96111B
IRF7379QPbF
HEXFET® Power MOSFET
8 D2
N-Ch P-Ch
7 D2
6 D1
VDSS
30V
-30V
5 D1 RDS(on) 0.0450.090
SO-8
Absolute Maximum Ratings
VSD
ID @ TA = 25°C
ID @ TA = 70°C
IDM
PD @TA = 25°C
VGS
dv/dt
TJ, TSTG
Parameter
Drain-to-Source Voltage
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current 
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery dv/dt ‚
Junction and Storage Temperature Range
Max.
N-Channel
P-Channel
30 -30
5.8 -4.3
4.6 -3.4
46 -34
2.5
0.02
± 20
5.0 -5.0
-55 to + 150
Units
A
W
W/°C
V
V/ns
°C
Thermal Resistance Ratings
RθJA
www.irf.com
Parameter
Maximum Junction-to-Ambient„
Max.
50
Units
°C/W
1
08/09/10

1 page




IRF7379QPbF pdf
N-Channel
IRF7379QPbF
1000
800
600
400
VGS = 0V,
f = 1MHz
Ciss = Cgs + Cgd , Cds SHORTED
Crss = Cgd
Coss = Cds + C gd
Ciss
Coss
20 IVDDS==2.244AV
16
12
8
200 Crss
0A
1 10 100
VDS , Drain-to-Source Voltage (V)
Fig 8. Typical Capacitance Vs.
Drain-to-Source Voltage
4
FOR TEST CIRCUIT
SEE FIGURE 11
0A
0 5 10 15 20 25
QG , Total Gate Charge (nC)
Fig 9. Typical Gate Charge Vs.
Gate-to-Source Voltage
100
D = 0.50
10 0.20
0.10
0.05
1 0.02
0.01
0.1
0.00001
SINGLE PULSE
(THERMAL RESPONSE)
0.0001
0.001
PDM
t1
t2
Notes:
1. Duty factor D = t1 / t 2
2. Peak T J = P DM x Z thJA + TA
0.01 0.1
1
t1 , Rectangular Pulse Duration (sec)
10
100
Fig 10. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
www.irf.com
5

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