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PDF FA5590 Data sheet ( Hoja de datos )
| Número de pieza | FA5590 | |
| Descripción | Power Supply Control IC | |
| Fabricantes | Fuji | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de FA5590 (archivo pdf) en la parte inferior de esta página. Total 21 Páginas | ||
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FA5590N,FA5591N
FUJI Power Supply Control IC
Power Factor Correction
FA5590／FA5591
Application Note
Fuji Electric Co., Ltd.
AN-016E Rev.1.2
April-2011
April-2011
Fuji Electric Co.,Ltd
1 http://www.fujielectric.co.jp/products/semiconductor/
1 page  
5. Block diagram
FA5590N,FA5591N
1.8uA
6. Pin assignment
VCC OUT GND
876
IS
5
1234
FB COMP RT RTZC
Pin Pin
No. symbol
1 FB
2 COMP
3 RT
4 RTZC
5 IS
6 GND
7 OUT
8 VCC
Function
Feedback Voltage Input
Compensation
Set Maximum on time
Set Delay time
Current Sense Input
Ground
Output
Power Supply
Description
Input for monitoring PFC output voltage
Output of error amplifier
Set Maximum on time by connecting
resistor
Set Delay time of Turn-on from zero-cross
timing by connecting resistor
Input for sensing current
Ground
Output for driving a power MOSFET
Power supply for IC
Fuji Electric Co., Ltd.
AN-016E Rev.1.2
April-2011
5 http://www.fujielectric.co.jp/products/semiconductor/
5 Page 
FA5590N,FA5591N
9. Outline of circuit operation
This IC is a power-factor correction converter
utilizing a boosting chopper, operating in critical
mode. Hereinafter is outline of the operation
consisting of switching operation and power-factor
correction operation using the circuit diagram
shown in Fig. 1.
(1) Switching operation
This IC performs the switching operation in the
critical mode applying self-oscillation without using
an oscillator. Fig. 2 shows the outline of waveforms
of the switching operation in steady state. The
operation is as follows.
t1. Q1 turns on, the current through inductor (L1)
rises from zero. At the timing of Q1 on,
Vramp; output of ramp generator states to
rise.
t2. Vramp and Vcomp; output of the error
amplifier are compared by the PWM
comparator, and when Vramp>Vcomp, Q1
turns off and the output of the ramp generator
drops.
When Q1 turns off, the voltage across L1
inverts and the current through L1 decreases
while the current is supplied to the output side
through D1.
t3. The current through L1 is detected by Is
terminal, and when the current becomes zero,
the output of the current detection comparator
becomes High to turn on Q1 after delay given
by the delay circuit, thus moving to the next
switching cycle (t1).
Iin IL1
AC C1
By repeating the operations of t1 ~ t3, the switching
in critical mode is continued.
With the power-factor correction circuit in the
critical mode, the switching frequency is always
changing due to instantaneous values of the AC
input voltage. The switching frequency also
changes when the input voltage or load changes.
OUT
(Q1 gate)
Q1
Vds
IL1
Vcomp
Vramp
PWM.comp.
output
(reset)
ZCD.comp.
output
(set)
t1
t2 t3 t1
Fig. 2 Switching Operation, Waveforms
L1 D1
Q1
Vds
Rs
Vo
IS
5
OCP.comp
ZCD.comp
-10mV
RTZC
4
Delay
-0.6V
Restart
RAMP
OSC
PWM.comp
RT
3
FA5590/91
COMP
2
OUT
7
RQ
UVLO
S
OVP
SP
TIMER
ERRAMP
Restart
FB
1
2.5V
Fuji Electric Co., Ltd.
AN-016E Rev.1.2
April-2011
Fig.1 Block diagram of operating circuit
11 http://www.fujielectric.co.jp/products/semiconductor/
11 Page | ||
| Páginas | Total 21 Páginas | |
| PDF Descargar | [ Datasheet FA5590.PDF ] | |
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