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Número de pieza | 27128A | |
Descripción | 128K Production and UV EPROM | |
Fabricantes | Intel | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de 27128A (archivo pdf) en la parte inferior de esta página. Total 10 Páginas | ||
No Preview Available ! 27128A
128K (16K x 8) PRODUCTION AND UV ERASABLE PROMs
• Fast 150 nsec Access Time
- HMOS* 11-E Technology
• Low Power
- 100 mA Maximum Active
- 40 mA Maximum Standby
• intellgent Identifier™ Mode
- Automated Programming Operations
• ± 10% Vee Tolerance Available
• Available in 28-Pin Cerdip Package
(See Packaging Spec, Order #231369)
The Intel 27128A is a 5V only, 131, 072-bit ultraviolet erasable and electrically programmable read-only memo
ry (EPROM). The 27128A is fabricated with Intel's HMOS* 11-E technology which significantly reduces die size
and greatly improves the device's performance, reliability and manufacturability.
The 27128A is currently available in the CERDIP package providing flexibility in prototyping and R&D environ
ments where reprogrammability is required.
The 27128A is available in fast access times including 15 0 ns ( 27128A-1).This ensures compatibility with high
performance microprocessors, such as Intel's 8 MHz 8 0 186 allowing full speed operation without the addition
of WAIT states. The 27128A is also directly compatible with the 12 MHz 8 0 5 1 family.
*HMOS is a patented process of Intel Corporation.
Vcco<>--"
GND O<>---<.�.
Vpp�
DATA OUTPUTS
Oo-01
OUTPUT ENABLE
CHIP E NABLE
AND
PR OG LOGIC
OUTPUT BUF FERS
Ao-A13
ADDR ESS
INPUTS
v
DECODER
V-GATING
•
x.
DECODER
•
131,072-BIT
• CELL MATRIX
Figure 1. Block Diagram
230849-1
5-28
October 1990
Order Number: 230849-009
1 page intef
27128A
CAPACITANCE(2)TA = 2s0c, f = 1MHz
Symbol
C1N
CouT
Parameter
Input Capacitance
Output Capacitance
Typ(1)
4
8
Max
6
12
Unit
pF
pF
Conditions
V1N = OV
VouT = ov
AC TESTING INPUT/OUTPUT WAVEFORM
2.4
0.45
>2.0
0.8
TEST POINTS -----
2.0
OUTPUT
0.8
230849-3
A.G. testing inputs are driven at 2.4V for a Logic "1" and 0.45V
for a Logic "O". Timing measurements are made at 2.0V for a
Logic "1" and 0.8V fof a Logic "O."
AC TESTING LOAD CIRCUIT
1.3V
DEVICE
UNDER
TEST
CL= 100 pF
CL Includes Jig capacitance
230849-4
AC WAVEFORMS
V1H---
ADDRESSES
V1L ---'
V1H ---.,f
ADDRESS
VALID
---- lcE131___.
V1H _______.._., ____...
.,__toe Ill
---1,.,cc----
too12J
-
VALID OUTPUT
NOTES:
1. Typical values are for TA= 25'C and nominal supply voltages.
2. This parameter is only sampled and is not 100% tested.
3. OE may be delayed up to tcE-toE after the falling edge of CE without impact on lcE·
5-32
HIGHZ
230849-5
5 Page |
Páginas | Total 10 Páginas | |
PDF Descargar | [ Datasheet 27128A.PDF ] |
Número de pieza | Descripción | Fabricantes |
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