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PDF IRFBC40S Data sheet ( Hoja de datos )

Número de pieza IRFBC40S
Descripción Power MOSFET ( Transistor )
Fabricantes Vishay 
Logotipo Vishay Logotipo



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No Preview Available ! IRFBC40S Hoja de datos, Descripción, Manual

IRFBC40S, SiHFBC40S, IRFBC40L, SiHFBC40L
Vishay Siliconix
Power MOSFET
PRODUCT SUMMARY
VDS (V)
RDS(on) ()
Qg (Max.) (nC)
600
VGS = 10 V
60
Qgs (nC)
8.3
Qgd (nC)
30
Configuration
Single
1.2
D
I2PAK (TO-262)
D2PAK (TO-263)
G
SD
D
G
S
G
S
N-Channel MOSFET
ORDERING INFORMATION
Package
D2PAK (TO-263)
Lead (Pb)-free and Halogen-free SiHFBC40S-GE3
Lead (Pb)-free
Note
a. See device orientation.
IRFBC40SPbF
SiHFBC40S-E3
FEATURES
Halogen-free According to IEC 61249-2-21
Definition
• Surface Mount (IRFBC40S, SiHFBC40S)
• Low-Profile Through-Hole (IRFBC40L, SiHFBC40L)
• Available in Tape and Reel (IRFBC40S, SiHFBC40S)
• Dynamic dV/dt Rating
• 150 °C Operating Temperature
• Fast Switching
• Fully Avalanche Rated
• Compliant to RoHS Directive 2002/95/EC
DESCRIPTION
Third generation Power MOSFETs from Vishay provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and
cost-effectiveness.
The D2PAK is a surface mount power package capable of
the accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible
on-resistance in any existing surface mount package. The
D2PAK is suitable for high current applications because of
its low internal connection resistance and can dissipate up
to 2.0 W in a typical surface mount application. The
through-hole version (IRFBC40L, SiHFBC40L) is available
for low-profile applications.
D2PAK (TO-263)
SiHFBC40STRL-GE3a
IRFBC40STRLPbFa
SiHFBC40STL-E3a
I2PAK (TO-262)
SiHFBC40L-GE3
IRFBC40LPbF
SiHFBC40L-E3
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
Drain-Source Voltagee
Gate-Source Voltagee
Continuous Drain Current
Pulsed Drain Currenta,e
Linear Derating Factor
Single Pulse Avalanche Energyb, e
Repetitive Avalanche Currenta
Repetitive Avalanche Energya
Maximum Power Dissipation
Peak Diode Recovery dV/dtc, e
VGS at 10 V
TC = 25 °C
TC = 100 °C
TC = 25 °C
TA = 25 °C
VDS
VGS
ID
IDM
EAS
IAR
EAR
PD
dV/dt
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
for 10 s
TJ, Tstg
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. VDD = 50 V; starting TJ = 25 °C, L = 27 mH, Rg = 25 , IAS = 6.2 A (see fig. 12).
c. ISD 6.2 A, dI/dt 80 A/μs, VDD VDS, TJ 150 °C.
d. 1.6 mm from case.
e. Uses IRFBC40, SiHFBC40 data and test conditions.
LIMIT
600
± 20
6.2
3.9
25
1.0
570
6.2
13
130
3.1
3.0
- 55 to + 150
300d
UNIT
V
A
W/°C
mJ
A
mJ
W
V/ns
°C
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 91116
S11-1053-Rev. C, 30-May-11
www.vishay.com
1
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

1 page




IRFBC40S pdf
IRFBC40S, SiHFBC40S, IRFBC40L, SiHFBC40L
Vishay Siliconix
Fig. 9 - Maximum Drain Current vs. Case Temperature
VDS
VGS
Rg
RD
D.U.T.
10 V
Pulse width 1 µs
Duty factor 0.1 %
+- VDD
Fig. 10a - Switching Time Test Circuit
VDS
90 %
10 %
VGS
td(on) tr
td(off) tf
Fig. 10b - Switching Time Waveforms
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
VDS
Vary tp to obtain
required IAS
Rg
10 V
tp
L
D.U.T
IAS
0.01 Ω
+
- V DD
Fig. 12a - Unclamped Inductive Test Circuit
VDS
VDS
tp
VDD
IAS
Fig. 12b - Unclamped Inductive Waveforms
Document Number: 91116
S11-1053-Rev. C, 30-May-11
www.vishay.com
5
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

5 Page










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