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PDF IRF9620S Data sheet ( Hoja de datos )

Número de pieza IRF9620S
Descripción Power MOSFET ( Transistor )
Fabricantes Vishay 
Logotipo Vishay Logotipo



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No Preview Available ! IRF9620S Hoja de datos, Descripción, Manual

Power MOSFET
IRF9620S, SiHF9620S
Vishay Siliconix
PRODUCT SUMMARY
VDS (V)
RDS(on) ()
Qg (Max.) (nC)
- 200
VGS = - 10 V
22
Qgs (nC)
12
Qgd (nC)
10
Configuration
Single
S
1.5
D2PAK (TO-263)
G
GD
S
D
P-Channel MOSFET
ORDERING INFORMATION
Package
Lead (Pb)-free and Halogen-free
Lead (Pb)-free
Note
a. See device orientation.
D2PAK (TO-263)
SiHF9620S-GE3
IRF9620SPbF
SiHF9620S-E3
FEATURES
Halogen-free According to IEC 61249-2-21
Definition
• Surface Mount
• Available in Tape and Reel
• Dynamic dV/dt Rating
• P-Channel
• Fast Switching
• Ease of Paralleling
• Simple Drive Requirements
• Compliant to RoHS Directive 2002/95/EC
DESCRIPTION
The Power MOSFETs technology is the key to Vishay’s
advanced line of Power MOSFET transistors. The efficient
geometry and unique processing of the Power MOSFETs
design achieve very low on-state resistance combined with
high transconductance and extreme device ruggedness.
The D2PAK (TO-263) is a surface mount power package
capable of accommodating die sizes up to HEX-4. It
provides the highest power capability and the lowest
possible on-resistance in any existing surface mount
package. The D2PAK (TO-263) is suitable for high current
applications because of its low internal connection
resistance and can dissipate up to 2.0 W in a typical surface
mount application.
D2PAK (TO-263)
SiHF9620STRL-GE3a
IRF9620STRLPbFa
SiHF9620STL-E3a
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain Currenta
Linear Derating Factor
VGS at - 10 V
TC = 25 °C
TC = 100 °C
VDS
VGS
ID
IDM
Linear Derating Factor (PCB Mount)e
Inductive Current, Clamp
Maximum Power Dissipation
Maximum Power Dissipation (PCB Mount)e
Peak Diode Recovery dV/dtc
TC = 25 °C
TA = 25 °C
ILM
PD
dV/dt
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
for 10 s
TJ, Tstg
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 5).
b. Not Applicable
c. ISD - 3.5 A, dI/dt 95 A/μs, VDD VDS, TJ 150 °C.
d. 1.6 mm from case.
e. When mounted on 1” square PCB (FR-4 or G-10 material).
LIMIT
- 200
± 20
- 3.5
- 2.0
- 14
0.32
0.025
- 14
40
3.0
- 5.0
- 55 to + 150
300d
UNIT
V
A
W/°C
A
W
V/ns
°C
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 91083
S11-1051-Rev. C, 30-May-11
www.vishay.com
1
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

1 page




IRF9620S pdf
IRF9620S, SiHF9620S
Vishay Siliconix
5
RDS(on) measured with current
pulse of 2.0 µs duration. Initial
4 TJ = 25 °C. (Heating effect of
2.0 µs pulse is minimal.)
VGS = - 10 V
3
2
VGS = - 20 V
1
0
0 - 4 - 8 - 12 - 16 - 20
91083_12
ID, Drain Current (A)
Fig. 12 - Typical On-Resistance vs. Drain Current
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
25 50 75 100 125 150
91083_13
TC, Case Temperature (°C)
Fig. 13 - Maximum Drain Current vs. Case Temperature
40
35
30
25
20
15
10
5
0
0 20 40 60 80 100 120 140
91083_14
TC, Case Temperature (°C)
Fig. 14 - Power vs. Temperature Derating Curve
L
Vary tp to obtain
required IL
VGS = - 10 V tp
D.U.T.
VDS
VDD
EC
IL
VDD = 0.5 VDS
0.05 Ω
EC = 0.75 VDS
-
+
Fig. 15 - Clamped Inductive Test Circuit
VDD
IL
tp VDS
EC
Fig. 16 - Clamped Inductive Waveforms
VDS
VGS
RG
RD
D.U.T.
- 10 V
Pulse width 1 µs
Duty factor 0.1 %
-
+VDD
Fig. 17a - Switching Time Test Circuit
VGS
10 %
td(on) tr
td(off) tf
90 %
VDS
Fig. 17b - Switching Time Waveforms
Document Number: 91083
S11-1051-Rev. C, 30-May-11
www.vishay.com
5
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

5 Page










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