PDF LC898123AXD Data sheet ( Hoja de datos )

Número de pieza	LC898123AXD
Descripción	Optical Image Stabilization (OIS) / Auto Focus (AF) Controller & Driver
Fabricantes	ON Semiconductor
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No Preview Available ! LC898123AXD CMOS LSI Optical Image Stabilization (OIS) / Auto Focus (AF) Controller & Driver Overview LC898123AXD is a system LSI integrating an on-chip 32bit DSP, a Flash Memory and peripherals including analog circuits for Optical Image Stabilization (OIS) / Auto Focus (AF) control and H-bridge and constant current drivers. www.onsemi.com Features WLCSP35 3.39x2.3  On-chip 32-bit DSP  Motor Driver  Built-in software digital servo filter  OIS  Built-in Gyro filter Constant current linear driver (2ch, Ifull=195mA)  Flash Memory  12k Byte Flash memory to store data and DSP program  Peripherals H-bridge driver (2ch, Io max=220mA)  OP-AF (unidirection) Constant current linear driver (1ch, Ifull=125mA)  OP-AF (bidirection)  AD converter  12bit Constant current linear driver (1ch, Ifull=120mA)  CL-AF  Input 4ch  Equipped with a sample-hold circuit Constant current linear driver (1ch, Ifull=120mA) H-bridge driver (1ch, Io max=150mA)  DA converter  8bit  Output 3ch  Built-in 2-wire Serial I/F circuit  Package  WLCSP35 (3.39mm  2.3mm)  Pb-Free / Halogen Free (with clock stretch function)  Power Supply Voltage  Built-in Hall Bias circuit  AD/DA/VGA/LDO/OSC : AVDD30=2.6V to 3.6V  Built-in Hall Amp  Digital I/O : AVDD30=2.6V to 3.6V (Gain of Op-amp : 6, 12, 50, 75, 100, 150, 200)  Driver : VM=2.6V to 3.6V  Built-in OSC (Oscillator)  Typ. 41MHz (with Frequency adjustment function)  Core Logic : Generation by on-chip LDO DVDD15=1.5V (typ) output  Built-in LDO (Low Drop-Out regulator)  Digital Gyro I/F for various types of gyro (SPI Bus) ORDERING INFORMATION See detailed ordering and shipping information on page 12 of this data sheet. © Semiconductor Components Industries, LLC, 2015 September 2015 - Rev. 0 1 Publication Order Number : LC898123AXD/D 1 page Pin Description LC898123AXD I/O I Input O Output B Bidirection P Power 3IC 3IS 3ICUD 3ISUD 3ICD 3ISD Pin Specification 3V CMOS Input 3V CMOS Schmitt Input 3V CMOS Input with PullUp/PullDown 3V CMOS Schmitt Input with PullUp/PullDown 3V CMOS Input with PullDown 3V CMOS Schmitt Input with PullDown 3O2 3T2 3OD 3V 2mA Output 3V 2mA TriState Output 3V 2mA Open Drain Output 3IA 3V Analog Input 3OA 3V Analog Output Z/U/D HiZ/PullUp/PullDown H/L HIGH/LOW 3IC 3V CMOS Input PAD 3IS 3V Schmitt Input PAD 3ICUD 3V CMOS Input with PullUp/ Pulldown 3ISUD 3V Schmitt Input with PullUp/ Pulldown 3ICD 3V CMOS Input with Pulldown 3ISD 3V Schmitt Input with Pulldown PAD CTL CTL PAD CTL CTL PAD CTL PAD CTL 3O2 3V 2mA Output 3V 2mA 3T2 TriState Output 3OD 3V 2mA Open Drain Output PAD EN PAD PAD www.onsemi.com 5 5 Page LC898123AXD 2-wire serial Interface Timing The communication protocol is compatible with I2C (Fast mode Plus). This circuit has clock stretch function. I2C interface timing definition Item Symbol SCL clock frequency START condition hold time SCL clock Low period SCL clock High period Setup time for repetition START condition Data hold time Fscl tHD,STA tLOW tHIGH tSU,STA tHD,DAT Data setup time SDA, SCL rising time SDA, SCL falling time STOP condition setup time Bus free time between STOP and START tSU,DAT tr tf tSU,STO tBUF Pin name I2CCK I2CCK I2CDT I2CCK I2CCK I2CCK I2CDT I2CCK I2CDT I2CCK I2CDT I2CCK I2CDT I2CCK I2CDT I2CCK I2CDT I2CCK I2CDT Min Typ 0.26 0.5 0.26 0.26 0 (1) 50 0.26 0.5 Max 1000 0.9 120 120 Units kHz s s s s s ns ns ns s s (1) Although the I2C specification defines a condition that 300 ns of hold time is required internally, LC898123AXD is designed for a condition with typ. 100 ns of hold time. If SDA signal is unstable around falling point of SCL signal, please implement an appropriate treatment on board, such as inserting a resistor. www.onsemi.com 11 11 Page

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