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PDF NTMC1300R2 Data sheet ( Hoja de datos )
| Número de pieza | NTMC1300R2 | |
| Descripción | Power MOSFET ( Transistor ) | |
| Fabricantes | ON Semiconductor | |
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NTMC1300R2
Power MOSFET
3 Amps, 30 Volts
Complementary SO−8 Dual
Features
• Ultra Low RDS(on)
• Higher Efficiency Extending Battery Life
• Miniature SO−8 Surface Mount Package
Applications
• DC−DC Converters
• Power Management in Portable and Battery Powered Products, i.e.:
Computers, Printers, Cellular and Cordless Phones
• Low Voltage Motor Controls in Mass Storage Products, i.e.: Disk
Drives, Tape Drives
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Drain−to−Source Voltage
Gate−to−Source Voltage − Continuous
Drain Current − Continuous (Note 1)
N−Channel
P−Channel
VDSS
VGS
ID
30 V
±20 V
Adc
2.2
1.8
Drain Current − Continuous (Note 2)
N−Channel
P−Channel
ID Adc
2.8
2.3
Drain Current − Continuous (Note 3)
N−Channel
P−Channel
ID
Adc
3.6
3.0
Drain Current − Pulsed
N−Channel
P−Channel
IDM Apk
8.5
7.0
Total Power Dissipation @ TA = 25°C
(Note 3)
PD 2.0 W
Operating and Storage
Temperature Range
TJ, Tstg
−65 to
150
°C
Single Pulse Drain−to−Source Avalanche
Energy − Starting TJ = 25°C
(VDD = 20 Vdc, VGS = 10 Vdc,
IL = 2.45 Apk, L = 25 mH, RG = 25 W)
Thermal Resistance
Junction−to−Ambient (Note 1)
Junction−to−Ambient (Note 2)
Junction−to−Ambient (Note 3)
EAS
RqJA
75 mJ
178.5
106
62.5
°C/W
Maximum Lead Temperature for
Soldering Purposes for 10 Seconds
TL 260 °C
1. When surface mounted to an FR−4 board using minimum recommended pad
size, (Cu Area 0.412 in2), Steady State.
2. When surface mounted to an FR−4 board using 1″ pad size, (Cu Area
0.412 in2), Steady State.
3. When surface mounted to an FR−4 board using 1″ pad size, (Cu Area
0.412 in2), T ≤ 10 Seconds.
http://onsemi.com
3 AMPERES, 30 VOLTS
73 mW @ VGS = 10 V (Typ)
(N−Channel)
100 mW @ VGS = 10 V (Typ)
(P−Channel)
N−Channel
D1
P−Channel
D2
G1 G2
S1 S2
MARKING
DIAGRAM
8
SO−8, Dual
CASE 751
STYLE 11
EC1300
LYWW
1
EC1300
L
Y
WW
= Device Code
= Location Code
= Year
= Work Week
PIN ASSIGNMENT
Source−1
Gate−1
Source−2
Gate−2
18
27
36
45
(Top View)
Drain−1
Drain−1
Drain−2
Drain−2
ORDERING INFORMATION
Device
Package
Shipping
NTMC1300R2
SO−8 2500/Tape & Reel
© Semiconductor Components Industries, LLC, 2006
August, 2006 − Rev. 1
1
Publication Order Number:
NTMC1300R2/D
1 page  
NTMC1300R2
N−Channel
500
VDS = 0 V VGS = 0 V
Ciss
400
Crss
300
200
TJ = 25°C
Ciss
100
0
10
505
VGS VDS
Coss
Crss
10 15 20
GATE−TO−SOURCE OR DRAIN−TO−SOURCE
VOLTAGE (VOLTS)
Figure 13. Capacitance Variation
5
4 VDS
Qgs
3
QT
Qgd
20
VGS
16
12
2
ID = 3 A
8
TJ = 25°C
14
00
0 0.5 1 1.5 2 2.5 3 3.5
Qg, TOTAL GATE CHARGE (nC)
Figure 15. Gate−To−Source and
Drain−To−Source Voltage versus Total Charge
800 Ciss
700
600 Crss
P−Channel
500
400
300
200
100
0 VDS = 0 V VGS = 0 V
10 5 0 5
−VGS −VDS
10
15
TJ = 25°C
Ciss
Coss
Crss
20 25 30
GATE−TO−SOURCE OR DRAIN−TO−SOURCE
VOLTAGE (VOLTS)
Figure 14. Capacitance Variation
5 20
QT 18
4
Qgs
3
Qgd
VGS
16
14
12
10
28
6
1
VDS
ID = −3 A
TJ = 25°C
4
2
00
0 1 2 3 4 5 6 7 8 9 10
Qg, TOTAL GATE CHARGE (nC)
Figure 16. Gate−To−Source and
Drain−To−Source Voltage versus Total Charge
100
VDD = 24 V
ID = 1.0 A
VGS = 10 V
10
td(off)
tf
td(on)
tr
100
VVIDDG=DS
= −24 V
−1.0 A
= −10 V
10
td (off)
tf
tr
td (on)
1
1 10
RG, GATE RESISTANCE (OHMS)
Figure 17. Resistive Switching Time
Variation versus Gate Resistance
100
1
1 10
RG, GATE RESISTANCE (OHMS)
Figure 18. Resistive Switching Time
Variation versus Gate Resistance
http://onsemi.com
5
100
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet NTMC1300R2.PDF ] | |
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