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Número de pieza R5F2136CZKFP
Descripción MCU
Fabricantes Renesas 
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16
R8C/36W Group, R8C/36X Group,
R8C/36Y Group, R8C/36Z Group
User’s Manual: Hardware
RENESAS MCU
R8C Family / R8C/3x Series
All information contained in these materials, including products and product specifications,
represents information on the product at the time of publication and is subject to change by
Renesas Electronics Corp. without notice. Please review the latest information published by
Renesas Electronics Corp. through various means, including the Renesas Electronics Corp.
website (http://www.renesas.com).
www.renesas.com
Rev.1.10 Jul 2013

1 page




R5F2136CZKFP pdf
2. Notation of Numbers and Symbols
The notation conventions for register names, bit names, numbers, and symbols used in this manual are described
below.
(1) Register Names, Bit Names, and Pin Names
Registers, bits, and pins are referred to in the text by symbols. The symbol is accompanied by the word “register,”
“bit,” or “pin” to distinguish the three categories.
Examples the PM03 bit in the PM0 register
P3_5 pin, VCC pin
(2) Notation of Numbers
The indication “b” is appended to numeric values given in binary format. However, nothing is appended to the
values of single bits. The indication “h” is appended to numeric values given in hexadecimal format. Nothing is
appended to numeric values given in decimal format.
Examples Binary: 11b
Hexadecimal: EFA0h
Decimal: 1234

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R5F2136CZKFP arduino
9.8.3
9.8.4
Oscillation Stop Detection Function ................................................................................................. 161
Oscillation Circuit Constants ............................................................................................................ 161
10. Protection .................................................................................................................................... 162
10.1 Register .................................................................................................................................................. 162
10.1.1 Protect Register (PRCR) ................................................................................................................... 162
11. Interrupts ..................................................................................................................................... 163
11.1 Overview ............................................................................................................................................... 163
11.1.1 Types of Interrupts ............................................................................................................................ 163
11.1.2 Software Interrupts ........................................................................................................................... 164
11.1.3 Special Interrupts .............................................................................................................................. 165
11.1.4 Peripheral Function Interrupts .......................................................................................................... 165
11.1.5 Interrupts and Interrupt Vectors ........................................................................................................ 166
11.2 Registers ................................................................................................................................................ 168
11.2.1
Interrupt Control Register
(TRA1IC, TREIC, S2TIC, S2RIC, KUPIC, ADIC, CMP1IC, S0TIC, S0RIC, S1TIC, S1RIC,
TRA0IC, TRBIC, TRFIC, CMP0IC, U2BCNIC, CAPIC, C0RIC, C0TIC, C0FRIC, C0FTIC, C0EIC,
C0WIC, VCMP1IC, VCMP2IC) ...................................................................................................... 168
11.2.2 Interrupt Control Register (FMRDYIC, TRCIC, TRD0IC, TRD1IC, SSUIC, TRGIC) .................. 169
11.2.3 INTi Interrupt Control Register (INTiIC) (i = 0 to 4) ....................................................................... 170
11.3 Interrupt Control .................................................................................................................................... 171
11.3.1 I Flag ................................................................................................................................................. 171
11.3.2 IR Bit ................................................................................................................................................. 171
11.3.3 Bits ILVL2 to ILVL0, IPL ................................................................................................................ 171
11.3.4 Interrupt Sequence ............................................................................................................................ 172
11.3.5 Interrupt Response Time ................................................................................................................... 173
11.3.6 IPL Change when Interrupt Request is Acknowledged .................................................................... 173
11.3.7 Saving Registers ............................................................................................................................... 174
11.3.8 Returning from Interrupt Routine ..................................................................................................... 176
11.3.9 Interrupt Priority ............................................................................................................................... 176
11.3.10 Interrupt Priority Level Selection Circuit ......................................................................................... 177
11.4 INT Interrupt ......................................................................................................................................... 178
11.4.1 INTi Interrupt (i = 0 to 4) .................................................................................................................. 178
11.4.2 INT Interrupt Input Pin Select Register (INTSR) ............................................................................. 179
11.4.3 External Input Enable Register 0 (INTEN) ...................................................................................... 180
11.4.4 External Input Enable Register 1 (INTEN1) .................................................................................... 180
11.4.5 INT Input Filter Select Register 0 (INTF) ........................................................................................ 181
11.4.6 INT Input Filter Select Register 1 (INTF1) ...................................................................................... 181
11.4.7 INTi Input Filter (i = 0 to 4) .............................................................................................................. 182
11.5 Key Input Interrupt ................................................................................................................................ 183
11.5.1 Key Input Enable Register 0 (KIEN) ................................................................................................ 184
11.6 Address Match Interrupt ........................................................................................................................ 185
11.6.1 Address Match Interrupt Enable Register i (AIERi) (i = 0 or 1) ...................................................... 186
11.6.2 Address Match Interrupt Register i (RMADi) (i = 0 or 1) ................................................................ 186
11.7 Timer RC Interrupt, Timer RD Interrupt, Timer RG Interrupt, Synchronous Serial Communication Unit
Interrupt, and Flash Memory Interrupt (Interrupts with Multiple Interrupt Request Sources) ............. 187
11.8 Notes on Interrupts ................................................................................................................................ 189
11.8.1 Reading Address 00000h .................................................................................................................. 189
A-4

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