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PDF FQA9N90_F109 Data sheet ( Hoja de datos )

Número de pieza FQA9N90_F109
Descripción N-Channel QFET MOSFET
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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FQA9N90_F109
N-Channel QFET® MOSFET
900 V, 8.6 A, 1.3
May 2014
Features
• 8.6 A, 900 V, RDS(on) = 1.3 (Max.) @ VGS = 10 V, ID = 4.3 A
• Low Gate Charge (Typ. 55 nC)
• Low Crss (Typ. 25 pF)
• 100% Avalanche Tested
• RoHS Compliant
Description
This N-Channel enhancement mode power MOSFET is
produced using Fairchild Semiconductor’s proprietary planar
stripe and DMOS technology. This advanced MOSFET
technology has been especially tailored to reduce on-state
resistance, and to provide superior switching performance and
high avalanche energy strength. These devices are suitable for
switched mode power supplies, active power factor correction
(PFC), and electronic lamp ballasts.
D
G
D
S
TO-3PN
G
Absolute Maximum Ratings TC = 25°C unless otherwise noted.
Symbol
Parameter
VDSS
ID
IDM
VGSS
EAS
IAR
EAR
dv/dt
Drain-Source Voltage
Drain Current
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
- Pulsed
Gate-Source Voltage
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
(Note 1)
(Note 2)
(Note 1)
(Note 1)
(Note 3)
PD Power Dissipation (TC = 25°C)
- Derate Above 25°C
TJ, TSTG
TL
Operating and Storage Temperature Range
Maximum Lead Temperature for Soldering,
1/8 from Case for 5 Seconds
Thermal Characteristics
Symbol
RθJC
RθCS
RθJA
Parameter
Thermal Resistance, Junction-to-Case, Max.
Thermal Resistance, Case-to-Sink, Typ.
Thermal Resistance, Junction-to-Ambient, Max.
©2007 Fairchild Semiconductor Corporation
FQA9N90_F109 Rev. C2
1
S
FQA9N90_F109
900
8.6
5.45
34.4
± 30
900
8.6
24
4.0
240
1.92
-55 to +150
300
FQA9N90_F109
0.52
0.24
40
Unit
V
A
A
A
V
mJ
A
mJ
V/ns
W
W/°C
°C
°C
Unit
°C/W
°C/W
°C/W
www.fairchildsemi.com

1 page




FQA9N90_F109 pdf
Same Type
50KΩ as DUT
12V 200nF
300nF
VGS
10V
Qg
VGS
VDS
Qgs Qgd
IG = co3nmsAt.
DUT
Charge
Figure 12. Gate Charge Test Circuit & Waveform
V10GVS
VDS
VGS
RG
RL
VDD
DUT
VDS
90%
VGS 10%
td(on)
tr
t on
td(off)
tf
t off
Figure 13. Resistive Switching Test Circuit & Waveforms
V1G0GVSS
tp
VDS
ID
RG
L
EAS
=
--1--
2
L IAS2
------B--V--D--S-S-------
BVDSS - VDD
BVDSS
IAS
VDD ID (t)
DUT
VDD
VDS (t)
t p Time
Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms
©2007 Fairchild Semiconductor Corporation
FQA9N90_F109 Rev. C2
5
www.fairchildsemi.com

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