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Número de pieza TEA1753T
Descripción HV start-up DCM/QR flyback controller
Fabricantes NXP Semiconductors 
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TEA1753T datasheet

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TEA1753T pdf
NXP Semiconductors
6. Pinning information
6.1 Pinning
TEA1753T
HV start-up flyback controller with integrated PFC controller
VCC 1
GND 2
FBCTRL 3
FBAUX 4
LATCH 5
PFCCOMP 6
VINSENSE 7
PFCAUX 8
16 HV
15 HVS
14 PFCTIMER
TEA1753T
13 FBDRIVER
12 PFCDRIVER
11 PFCSENSE
10 FBSENSE
9 VOSENSE
001aan780
Fig 2. Pin configuration: TEA1753T (SOT109-1)
6.2 Pin description
Table 2. Pin description
Symbol
Pin
VCC
GND
1
2
FBCTRL
3
FBAUX
4
LATCH
5
PFCCOMP
6
VINSENSE
7
PFCAUX
8
VOSENSE
9
FBSENSE
10
PFCSENSE
11
PFCDRIVER 12
FBDRIVER
13
PFCTIMER
14
HVS
15
HV 16
Description
supply voltage
ground
flyback control input
auxiliary winding input for demagnetization timing and flyback OVP
general-purpose protection input
frequency compensation pin for PFC
mains voltage sense input
auxiliary winding input for demagnetization timing for PFC
sense input for PFC output voltage
flyback current sense input
PFC current sense input
PFC gate-driver output
flyback gate-driver output
delay timer pin for PFC on/off control
high-voltage safety spacer, not connected
high-voltage start-up / flyback valley sensing
TEA1753T
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3. — 24 August 2012
© NXP B.V. 2012. All rights reserved.
5 of 32

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TEA1753T arduino
NXP Semiconductors
TEA1753T
HV start-up flyback controller with integrated PFC controller
If a demagnetization signal is not detected on the PFCAUX pin, the controller generates a
Zero-current Signal (ZCS), 50 s after the last PFCGATE signal.
If a valley signal is not detected on the PFCAUX pin, the controller generates a valley
signal 4 s after demagnetization is detected.
To protect the internal circuitry during lightning events, for example, add a 5 kseries
resistor to PFCAUX. To prevent incorrect switching due to external disturbance, place the
resistor close to the IC on the printed-circuit board.
7.2.3 Frequency limitation
To optimize the transformer and minimize switching losses, the switching frequency is
limited to fsw(PFC)max. If the frequency for quasi-resonant operation is above the fsw(PFC)max
limit, the system switches over to DCM. The PFC MOSFET is only switched on at a
minimum voltage across the switch (valley switching).
7.2.4 Mains voltage compensation (VINSENSE pin)
The equation for the transfer function of a power factor corrector contains the square of
the mains input voltage. In a typical application, this results in a low bandwidth for low
mains input voltages and a high bandwidth for high mains input voltages.
To compensate for the mains input voltage influence, the TEA1753T contains a correction
circuit. The average input voltage is measured using the VINSENSE pin and the
information is fed to an internal compensation circuit. Using this compensation, it is
possible to keep the regulation loop bandwidth constant over the mains input range. This
feature yields a fast transient response on load steps, while still complying with class-D
MHR requirements.
In a typical application, a resistor and two capacitors connected to the PFCCOMP pin set
the bandwidth of the regulation loop.
7.2.5 Soft-start-up (PFCSENSE pin)
To prevent audible transformer noise at start-up or during hiccup, the soft-start function
slowly increases the transformer peak current. This increase is achieved by inserting RSS1
and CSS1 between the PFCSENSE pin and the current sense resistor RSENSE1.
An internal current source charges the capacitor to:
VPFCSENSE = IstartsoftPFC RSS1
(1)
The voltage is limited to Vstart(soft)PFC.
The start level and the time constant of the increasing primary current level is adjusted
externally by changing the values of RSS1 and- CSS1.
softstart = 3 RSS1 CSS1
(2)
The charging current Istart(soft)PFC flows as long as VPFCSENSE is below 0.5 V. If VPFCSENSE
exceeds 0.5 V, the soft-start current source starts limiting current Istart(soft)PFC. When the
PFC starts switching, the Istart(soft)PFC current source is switched off; see Figure 5.
TEA1753T
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3. — 24 August 2012
© NXP B.V. 2012. All rights reserved.
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