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Número de pieza ADV7481
Descripción Integrated Video Decoder and Dual Mode HDMI/MHL Receiver
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo
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ADV7481 datasheet

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ADV7481 pdf
Data Sheet
ADV7481
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
AVDD = 1.71 V to 1.89 V, DVDD = 1.71 V to 1.89 V, PVDD = 1.71 V to 1.89 V, MVDD = 1.71 V to 1.89 V, CVDD = 1.71 V to 1.89 V,
DVDDIO = 3.14 V to 3.46 V, and TVDD = 3.14 V to 3.46 V, specified at operating temperature range, unless otherwise noted.
Table 1.
Parameter
STATIC PERFORMANCE
Resolution (Each ADC)
Integral Nonlinearity
Differential Nonlinearity
DIGITAL INPUTS1
Input High Voltage
Input Low Voltage
Input Leakage Current
Input Capacitance2
CRYSTAL INPUT
Input High Voltage
Input Low Voltage
DIGITAL OUTPUTS1
Output High Voltage
Output Low Voltage
High Impedance Leakage Current
Output Capacitance2
POWER REQUIREMENTS
Digital Power Supply
HDMI/MHL Terminator Supply
HDMI/MHL Comparator Supply
PLL Power Supply
MIPI Transmitters Power Supply
Digital Input/Output Power Supply1
Analog Power Supply
CURRENT CONSUMPTION1, 2, 3, 4
Digital Supply Current
Single-Ended CVBS Input
Fully Differential and Pseudo
Differential CVBS Input
Y/C Input
YPbPr Input
HDMI Input
MHL Input
8-Bit Digital Input
Symbol Test Conditions/Comments
N
INL CVBS mode
DNL CVBS mode
SCLK, SDATA, RESET, ALSB, SPI_CS, SPI_SCLK,
SPI_MOSI, LLC, and P0 to P7
VIH DVDDIO = 3.14 V to 3.46 V
VIL DVDDIO = 3.14 V to 3.46 V
IIN
CIN
VIH XTALP
VIL XTALP
LLC, P0 to P7, I2S_MCLK, I2S_SCLK, I2S_LRCLK,
I2S_SDATA, SPI_MISO, SDATA, INTRQ1 to INTRQ3
(when configured to drive when active), and
VBUS_EN
VOH DVDDIO = 3.14 V to 3.46 V and ISOURCE = 0.4 mA
VOL DVDDIO = 3.14 V to 3.46 V and ISINK = 3.2 mA
ILEAK
COUT
DVDD
TVDD
CVDD
PVDD
MVDD
DVDDIO
AVDD
3.3 V operation
IDVDD
Min Typ Max Unit
10
2
±0.6
Bits
LSB
LSB
2V
0.8 V
−10 +10 µA
10 pF
1.2 V
0.4 V
2.4
10
V
0.4 V
µA
20 pF
1.71 1.8
3.14 3.3
1.71 1.8
1.71 1.8
1.71 1.8
3.14 3.3
1.71 1.8
1.89 V
3.46 V
1.89 V
1.89 V
1.89 V
3.46 V
1.89 V
279
74.5
74.7
71.3
72.8
68.1
93.5
32.5
mA
mA
mA
mA
mA
mA
mA
mA
Rev. 0 | Page 5 of 22

5 Page

ADV7481 arduino
ADV7481
Data Sheet
Parameter
Symbol Test Conditions/Comments
Min Typ Max Unit
8-BIT DIGITAL INPUT PORT2
DVDDIO = 3.14 V to 3.46 V
LLC High Time3
t21
45 55 % duty
cycle
LLC Low Time3
45 55 % duty
cycle
SDR and DDR Modes Setup Time t22 Data latched on rising edge
1
ns
SDR and DDR Modes Hold Time
t23 Data latched on rising edge
1
ns
DDR Mode Setup Time
t24 Data latched on falling edge
1
ns
DDR Mode Hold Time
t25 Data latched on falling edge
1
ns
8-BIT DIGITAL OUTPUT PORT2
DVDDIO = 3.14 V to 3.46 V
LLC High Time
t26
40 60 % duty
cycle
LLC Low Time
40 60 % duty
cycle
SDR Modes Setup Time4, 5
t36 At P0 to P7 output pin, data latched 1.98
on rising edge
ns
SDR Modes Hold Time4, 5
t37 At P0 to P7 output pin, data latched 2.50
on rising edge
ns
DDR Modes Setup Time4, 5
t27 At P0 to P7 output pin, data latched 1.66
on rising edge
ns
DDR Modes Hold Time4, 5
t28 At P0 to P7 output pin, data latched 3.52
on rising edge
ns
DDR Mode Setup Time4, 5
t29 At P0 to P7 output pin, data latched 1.71
on falling edge
ns
DDR Modes Hold Time4, 5
t30 At P0 to P7 output pin, data latched 3.17
on falling edge
ns
I2S PORT, MASTER MODE
I2S_SCLK High Time
t31
45 55 % duty
cycle
I2S_SCLK Low Time
45 55 % duty
cycle
I2S_LRCLK Data Transition Time t32 End of valid data to I2S_SCLK falling
edge
10 ns
t33 I2S_SCLK falling edge to start of valid
data
10 ns
I2S_SDATA Data Transition Time
t34
End of valid data to I2S_SCLK falling
edge
5 ns
t35 I2S_SCLK falling edge to start of valid
data
5 ns
1 Required by design.
2 The 8-bit digital input/output port is only available when the DVDDIO supply is between 3.14 V and 3.46 V.
3 Guaranteed by design.
4 These specifications only apply when the LLC_DLL_PHASE[4:0] (IO Map, Register 0x0C[4:0]) is set to 00000.
5 Guaranteed by lab characterization.
Rev. 0 | Page 10 of 22

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