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PDF FDS8958A_F085 Data sheet ( Hoja de datos )

Número de pieza FDS8958A_F085
Descripción Dual N & P-Channel PowerTrench MOSFET
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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February 2010
FDS8958A_F085
Dual N & P-Channel PowerTrench® MOSFET
tm
General Description
These dual N- and P-Channel enhancement mode
power field effect transistors are produced using
Fairchild Semiconductor’s advanced PowerTrench
process that has been especially tailored to minimize
on-state ressitance and yet maintain superior switching
performance.
These devices are well suited for low voltage and
battery powered applications where low in-line power
loss and fast switching are required.
Features
Q1: N-Channel
7.0A, 30V
RDS(on) = 0.028@ VGS = 10V
RDS(on) = 0.040@ VGS = 4.5V
Q2: P-Channel
-5A, -30V
RDS(on) = 0.052@ VGS = -10V
RDS(on) = 0.080@ VGS = -4.5V
Fast switching speed
High power and handling capability in a widely
used surface mount package
Qualified to AEC Q101
RoHS Compliant
DD1DD2DD2
DD1
SO-8
Pin 1 SO-8
SS1GS1SS2GG2
Absolute Maximum Ratings TA = 25°C unless otherwise noted
Symbol
Parameter
VDSS
VGSS
ID
PD
EAS
TJ, TSTG
Drain-Source Voltage
Gate-Source Voltage
Drain Current - Continuous
- Pulsed
Power Dissipation for Dual Operation
(Note 1a)
Power Dissipation for Single Operation
(Note 1a)
(Note 1c)
Single Pulse Avalanche Energy
(Note 3)
Operating and Storage Junction Temperature Range
Thermal Characteristics
RθJA Thermal Resistance, Junction-to-Ambient
RθJC Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
Package Marking and Ordering Information
Device Marking
Device
Reel Size
FDS8958A
FDS8958A_F085
13”
©2010 Fairchild Semiconductor Corporation
FDS8958A_F085 Rev. A
1
5 Q2
6
Q1
7
8
4
3
2
1
Q1 Q2
30 30
±20 ±20
7 -5
20 -20
22
1.6 1.6
0.9 0.9
54 13
-55 to +150
Units
V
V
A
W
mJ
°C
78 °C/W
40 °C/W
Tape width
12mm
Quantity
2500 units
www.fairchildsemi.com

1 page




FDS8958A_F085 pdf
Typical Characteristics: Q1 (N-Channel)
10
ID = 7A
8
6
VDS = 10V
20V
15V
4
2
0
0 2 4 6 8 10
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics.
12
100
RDS(ON) LIMIT
10
1
VGS = 10V
0.1 SINGLE PULSE
RθJA = 135oC/W
TA = 25oC
1ms
10ms
100ms
1s
10s
DC
100µs
0.01
0.1
1 10
VDS, DRAIN-SOURCE VOLTAGE (V)
100
Figure 9. Maximum Safe Operating Area.
800
f = 1MHz
VGS = 0 V
600
Ciss
400
Coss
200
Crss
0
0
5 10 15
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 8. Capacitance Characteristics.
20
10
Tj=25  
Tj=125  
1
0.01
0.1 1 10
tAV, TIME IN AVALANCHE (mS)
100
Figure 10. Unclamped Inductive Switching
Capability Figure
50
40
30
20
10
0
0.001
SINGLE PULSE
RθJA = 135°C/W
TA = 25°C
0.01 0.1 1 10
t1, TIME (sec)
100
Figure 11. Single Pulse Maximum Power Dissipation.
1000
FDS8958A_F085 Rev. A
5
www.fairchildsemi.com

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